Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp979706pxj; Fri, 4 Jun 2021 03:08:59 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzKvrgnBRl9AoDf3XhjjuivSgmS6ODG0XhGMgvrMzYSW8eeeBshhrI7aL528v94L6eoK13B X-Received: by 2002:a17:906:1591:: with SMTP id k17mr3504009ejd.401.1622801339115; Fri, 04 Jun 2021 03:08:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622801339; cv=none; d=google.com; s=arc-20160816; b=aO8dK0NYrpcK7GVEy3/D5qzq6vhu3VoQzTmlN2CO10/wwO+lPznxpUwe2dvwWv0WkU Dij9YsEnT5dYFj7Z+kkoruSL1Da7PoWMmlJgPl8Z2C8l407YEPdoI5HGzFPMBRwWQwaE IH/9EzHVkqRvIxBwtUqdTueIFuFViu9f1CI9Db8r5hKhwplZhoe9aIfqNDugCRKLutE4 QMlabEsIfO0205r2tCLXNzcP+pmtjEGpkcVO/jk2G02HK06KmQORslx8EoU2eyyykQ// B/9nVy61+kDtfz4huPeTeNVdd/bR1egA88O/hUbVhZ8WcObpuBSYbaEuTjCQPRdl3xVr 0BMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=1EOwsC2veTsTjY8sX5zVqJAz8f21WHEC/gZ8+CYdt10=; b=qiiJ/ZZs2ovyq0WsfSY4REpph5dVf47qLWaBHZlHQHSYOQyzIjOO5Ces0Sc5Go2Pla 3HozIlXiJwU0ckm1+nnO39MxZfQYp5/QvSVeghmaudv3/FGSHp3sJoWjSBByl7xcM16R mt7ge5XWmKlHrDXoGc3F/xAYbKFyymH2Kka/CSc7xt0Y32J41+JoyZkYi/FY1xMMp154 ADK56v950tKTo3yEXQVdS8kiHFDpT2QcQPr02DmHXfUB87f69XO0cI98JcZy5DE5uEdw XF9t/R7/CFD0Xok1dGGlYCCkUaGXv3nOmCFoC552aT66c9Bcd2g6d8EVA6vZ9qE8AFhM LOzw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j3si2363910ejo.404.2021.06.04.03.08.34; Fri, 04 Jun 2021 03:08:59 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230355AbhFDKF4 (ORCPT + 99 others); Fri, 4 Jun 2021 06:05:56 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:34226 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S230475AbhFDKFq (ORCPT ); Fri, 4 Jun 2021 06:05:46 -0400 X-UUID: e45fad978d6b432fbc9833659a18b749-20210604 X-UUID: e45fad978d6b432fbc9833659a18b749-20210604 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1185837069; Fri, 04 Jun 2021 18:02:42 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 4 Jun 2021 18:02:26 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 4 Jun 2021 18:02:26 +0800 From: Dawei Chien To: Georgi Djakov , Rob Herring , Matthias Brugger , Stephen Boyd , Ryan Case CC: Mark Rutland , Nicolas Boichat , , , , , , Fan Chen , Arvin Wang , James Liao , Henry Chen , Dawei Chien Subject: [PATCH V10 10/12] arm64: dts: mt8192: add dvfsrc related nodes Date: Fri, 4 Jun 2021 18:02:16 +0800 Message-ID: <20210604100218.13613-11-dawei.chien@mediatek.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20210604100218.13613-1-dawei.chien@mediatek.com> References: <20210604100218.13613-1-dawei.chien@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Henry Chen Add DDR EMI provider dictating dram interconnect bus performance found on MT8183-based platforms Signed-off-by: Henry Chen Signed-off-by: Dawei Chien --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index c70a3bf744fa..ab3dabcc722e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -5,6 +5,7 @@ */ /dts-v1/; +#include #include #include #include @@ -286,6 +287,7 @@ compatible = "mediatek,mt8192-dvfsrc", "mediatek,mt6873-dvfsrc"; reg = <0 0x10012000 0 0x1000>; + #interconnect-cells = <1>; }; systimer: timer@10017000 { -- 2.14.1