Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp993632pxj; Fri, 4 Jun 2021 03:33:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxjkqDjquRVI70hXoe6c7GwEa1fjWeFXRhy2MXQ1ewXlTnQEsbBMbKfuqQsPVafuN0WS7Or X-Received: by 2002:a17:906:8608:: with SMTP id o8mr3604007ejx.72.1622802795102; Fri, 04 Jun 2021 03:33:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622802795; cv=none; d=google.com; s=arc-20160816; b=D1GT7JqFcQv0Dok/Fm7AycjauleIgYkKcopwuPvX+9zfBh3PvRbajThEipdKRa4SmM 2zVm1Rq8C7jU1UUbDAj45dzbEzePOEkIwHOTjDcJrstxele52/F+ooXEzdGtajxtr6gf q6M77PomXLMwJLiFCspdbPZkB0phReR50mpo++1dS7KZZL3GqSuZhipPTSUVmhHO6e4i DVqSMkzdF/vbp6Xerp3y7LxJXJSMAYR64p+Lr6n9SzDfuiKcTeNm0I0yTSKkTNfaKtsW 1ID/DRH6FhfKE8uYqz37IPWPcxGT3kgAasvC/zUqBpSlSFlzVAi6gBjSSpQ580u+vuqL Nmtw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=AlgDLNWB58UjCEeKi66G2F9siFLKr98lyV+LtE8rLt0=; b=kTJYHO8zVatvH4c8bm818lfm1b/lK2Hp+tk+D6j2huiRkntXPGyQtNgegD+mayLleU DiQJQLIv+4GNvGlRaZgV5UIZgN/Ni2n0HpVJwrd6UhFpHwJlgKkF5P3HTKTF7Q6mcIDJ 4nub7Y+jw+HxS7VrU5xHH2RgMRXZGhWuD39Y0lhRnygmqPKzU31If0VWR9f+e74DWliu BdN4SXu+XtlXQWnfDTWJPqM1vJW6PsJVwpSaq2TNbCeZTs23oDw9TMcoq/uNgklVx6Vl imglphb3zzn/YW2VrMn2Ay5djId/f/2UJJUrvOy5jsdaw7vckm6IWTub96f2exb/rQj+ ZB0w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id bx19si4545306ejb.481.2021.06.04.03.32.39; Fri, 04 Jun 2021 03:33:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230233AbhFDKcZ (ORCPT + 99 others); Fri, 4 Jun 2021 06:32:25 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:52160 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S230111AbhFDKcL (ORCPT ); Fri, 4 Jun 2021 06:32:11 -0400 X-UUID: 72d12912b184482483b77e79fd4da66b-20210604 X-UUID: 72d12912b184482483b77e79fd4da66b-20210604 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1327992184; Fri, 04 Jun 2021 18:30:20 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 4 Jun 2021 18:30:12 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 4 Jun 2021 18:30:12 +0800 From: Dawei Chien To: Georgi Djakov , Rob Herring , Matthias Brugger , Stephen Boyd , Ryan Case CC: Mark Rutland , Nicolas Boichat , , , , , , Fan Chen , Arvin Wang , James Liao , Henry Chen Subject: [PATCH V10 05/12] arm64: dts: mt8183: add dvfsrc related nodes Date: Fri, 4 Jun 2021 18:29:52 +0800 Message-ID: <20210604102959.13807-6-dawei.chien@mediatek.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20210604102959.13807-1-dawei.chien@mediatek.com> References: <20210604102959.13807-1-dawei.chien@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Henry Chen Enable dvfsrc on mt8183 platform. Signed-off-by: Henry Chen --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index c5e822b6b77a..e5a4948920f3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -498,6 +498,11 @@ #clock-cells = <1>; }; + ddr_emi: dvfsrc@10012000 { + compatible = "mediatek,mt8183-dvfsrc"; + reg = <0 0x10012000 0 0x1000>; + }; + pwrap: pwrap@1000d000 { compatible = "mediatek,mt8183-pwrap"; reg = <0 0x1000d000 0 0x1000>; -- 2.14.1