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[23.128.96.18]) by mx.google.com with ESMTP id n7si11770729edr.392.2021.06.07.05.46.36; Mon, 07 Jun 2021 05:46:59 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231222AbhFGMql (ORCPT + 99 others); Mon, 7 Jun 2021 08:46:41 -0400 Received: from lucky1.263xmail.com ([211.157.147.134]:34152 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231209AbhFGMqi (ORCPT ); Mon, 7 Jun 2021 08:46:38 -0400 Received: from localhost (unknown [192.168.167.16]) by lucky1.263xmail.com (Postfix) with ESMTP id D454EC8492; Mon, 7 Jun 2021 20:44:44 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P32529T140357062862592S1623069879715065_; Mon, 07 Jun 2021 20:44:46 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <80b9561bac60db3418677257b4859855> X-RL-SENDER: jon.lin@rock-chips.com X-SENDER: jon.lin@rock-chips.com X-LOGIN-NAME: jon.lin@rock-chips.com X-FST-TO: linux-spi@vger.kernel.org X-RCPT-COUNT: 17 X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-System-Flag: 0 From: Jon Lin To: linux-spi@vger.kernel.org Cc: jon.lin@rock-chips.com, broonie@kernel.org, robh+dt@kernel.org, heiko@sntech.de, jbx6244@gmail.com, hjc@rock-chips.com, yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com, linux-rockchip@lists.infradead.org, linux-mtd@lists.infradead.org, p.yadav@ti.com, macroalpha82@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Chris Morgan Subject: [PATCH v5 8/8] arm64: dts: rockchip: Enable SFC for Odroid Go Advance Date: Mon, 7 Jun 2021 20:44:37 +0800 Message-Id: <20210607124437.4143-4-jon.lin@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210607124437.4143-1-jon.lin@rock-chips.com> References: <20210607124303.22393-1-jon.lin@rock-chips.com> <20210607124437.4143-1-jon.lin@rock-chips.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Chris Morgan This enables the Rockchip Serial Flash Controller for the Odroid Go Advance. Note that while the attached SPI NOR flash and the controller both support quad read mode, only 2 of the required 4 pins are present. The rx and tx bus width is set to 2 for this reason. Signed-off-by: Chris Morgan Signed-off-by: Jon Lin --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None Changes in v1: None .../boot/dts/rockchip/rk3326-odroid-go2.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts index 49c97f76df77..f78e11dd8447 100644 --- a/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts @@ -484,6 +484,22 @@ status = "okay"; }; +&sfc { + pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus2>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <108000000>; + spi-rx-bus-width = <2>; + spi-tx-bus-width = <2>; + }; +}; + &tsadc { status = "okay"; }; -- 2.17.1