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Of course it does. If the spec doesn't define exactly when the driver should call the cache flushes for no-snoop transactions then the protocol doesn't support no-soop. no-snoop is only used in very specific sequences of operations, like certain GPU usages, because regaining coherence on x86 is incredibly expensive. ie I wouldn't ever expect a NIC to use no-snoop because NIC's expect packets to be processed by the CPU. "non-coherent DMA" is some general euphemism that evokes images of embedded platforms that don't have coherent DMA at all and have low cost ways to regain coherence. This is not at all what we are talking about here at all. Jason