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Tue, 8 Jun 2021 17:22:20 +0000 Received: from BL0PR12MB5506.namprd12.prod.outlook.com ([fe80::3d51:a3b9:8611:684e]) by BL0PR12MB5506.namprd12.prod.outlook.com ([fe80::3d51:a3b9:8611:684e%7]) with mapi id 15.20.4219.021; Tue, 8 Jun 2021 17:22:20 +0000 Date: Tue, 8 Jun 2021 14:22:18 -0300 From: Jason Gunthorpe To: Dave Jiang Cc: Thomas Gleixner , alex.williamson@redhat.com, kwankhede@nvidia.com, vkoul@kernel.org, megha.dey@intel.com, jacob.jun.pan@intel.com, ashok.raj@intel.com, yi.l.liu@intel.com, baolu.lu@intel.com, kevin.tian@intel.com, sanjay.k.kumar@intel.com, tony.luck@intel.com, dan.j.williams@intel.com, eric.auger@redhat.com, pbonzini@redhat.com, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Subject: Re: [PATCH v6 05/20] vfio: mdev: common lib code for setting up Interrupt Message Store Message-ID: <20210608172218.GK1002214@nvidia.com> References: <162164243591.261970.3439987543338120797.stgit@djiang5-desk3.ch.intel.com> <162164277624.261970.7989190254803052804.stgit@djiang5-desk3.ch.intel.com> <87pmx73tfw.ffs@nanos.tec.linutronix.de> Content-Type: text/plain; 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How does a SVA userspace allocate interrupt handles and make them affine to the proper CPU(s)? IIRC interrupts are quite limited per-CPU due to the x86 IDT, generally I would expect a kernel driver to allocate at most one IRQ per CPU. However here you say each process using SVA needs a unique interrupt handle with its PASID encoded in it. Since the IMS irqchip you are using can't share IRQs between interrupt handles does this mean that every time userspace creates a SVA it triggers consumption of an IMS and IDT entry on some CPU? How is this secure against DOS of limited kernel resources? > driver does this by having the guest driver fill the virtual MSIX > permission table (device specific), which contains a PASID entry for > each of the MSIX vectors when SVA is turned on. The MMIO write to > the guest vMSIXPERM table allows the host driver MMIO emulation code > to retrieve the guest PASID and attempt to match that with the host > PASID. That host PASID is programmed to the IMS entry that is > backing the guest MSIX vector. This cannot be done via the common > path and therefore requires the auxdata helper function to program > the IMS PASID fields. So a VM guest gets a SW emulated vMSIXPERM table along side MSI-X, but the physical driver went down this IMS adventure? And you had to do this because, as discussed earlier, true IMS is not usable in the guest due to other platform problems? Jason