Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp5074751pxj; Wed, 9 Jun 2021 08:35:04 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzFcKkbG0D/3ppBU1+S5uQWQdl8huPkwBDlZ8FqFedZClfwjMEzC1AKx3GVA7h3ons683hp X-Received: by 2002:a17:906:4f10:: with SMTP id t16mr431483eju.337.1623252904272; Wed, 09 Jun 2021 08:35:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623252904; cv=none; d=google.com; s=arc-20160816; b=H9hgkDVkuNmBUhEcTt2OMoIAPpiRydM38KVljBaeMw/GibjpWYqXGq1RrRQua0bXGB OtllTTN1K8al255zXzgFXmQ6Vt6hXOiPeCPg/kXqbu4hdxujlVxlE5tPGLWr78uNMw2D 4tkL1o2FulkIF0zrELQswOXR+3sMed6on+5Vfy8Eej8qD+GT7B0IXs52HAEkHFhWWGEc RwJGMUh8SD18oiod0A4eIaCfHyyqEdgd5R7AbcdgSX0ngSg1qJiwgWgM5xPzGHeK+gtq px96ReFdXvAMghz/2R2lYXsjJ0J7ICA/af4wHk5TY1dydTnBJ60/91COGjfTHoes9AH2 2i5Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=rSyEvhUWlixWknypvsO58MOreZLJJpm51g/r8N3xglY=; b=EneZo6zXRVXumxuYC+PO10c41pYIcx/oOyJCXr5yacoWJ8K8kXP6ix/34s0gb0WS/c x5Rjo8/eTHX+kJ8sX91nYIQBdSGkMW+T9uhhMhLmWVPzJPLEILRY33ojiCOhZd3CxmH6 O/YxgsEoHUBTkrxcN46yOKUt6zjGexxwdJSSE+4jtB/YF+1cLZSeWnAFI0oq/lYtmWW+ T0IXOOaW3oB6Dj6rr7NDNKUivzdVxEqQDopjItX/TbiHZMZaljUvLgsrCjmy3GUMGTDC uEoUkQnWualk2BTEqbyY6dy8WJUtYuMD5FqAROf5WHzIRBbgSb7zvADKMCMPGKpTN9dF MCuA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id d20si136540ejy.157.2021.06.09.08.34.40; Wed, 09 Jun 2021 08:35:04 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237433AbhFIOGo (ORCPT + 99 others); Wed, 9 Jun 2021 10:06:44 -0400 Received: from lucky1.263xmail.com ([211.157.147.130]:56860 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237262AbhFIOGl (ORCPT ); Wed, 9 Jun 2021 10:06:41 -0400 Received: from localhost (unknown [192.168.167.235]) by lucky1.263xmail.com (Postfix) with ESMTP id 20596D1CB1; Wed, 9 Jun 2021 22:04:20 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P31748T140095042557696S1623247454096580_; Wed, 09 Jun 2021 22:04:20 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: X-RL-SENDER: jon.lin@rock-chips.com X-SENDER: jon.lin@rock-chips.com X-LOGIN-NAME: jon.lin@rock-chips.com X-FST-TO: linux-spi@vger.kernel.org X-RCPT-COUNT: 20 X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-System-Flag: 0 From: Jon Lin To: linux-spi@vger.kernel.org Cc: jon.lin@rock-chips.com, broonie@kernel.org, robh+dt@kernel.org, heiko@sntech.de, jbx6244@gmail.com, hjc@rock-chips.com, yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com, linux-rockchip@lists.infradead.org, linux-mtd@lists.infradead.org, p.yadav@ti.com, macroalpha82@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-clk@vger.kernel.org, Chris Morgan Subject: [PATCH v7 3/9] arm64: dts: rockchip: Add SFC to PX30 Date: Wed, 9 Jun 2021 22:04:06 +0800 Message-Id: <20210609140412.16058-4-jon.lin@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210609140412.16058-1-jon.lin@rock-chips.com> References: <20210609140412.16058-1-jon.lin@rock-chips.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Chris Morgan Add a devicetree entry for the Rockchip SFC for the PX30 SOC. Signed-off-by: Chris Morgan Signed-off-by: Jon Lin --- Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None Changes in v1: None arch/arm64/boot/dts/rockchip/px30.dtsi | 38 ++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 09baa8a167ce..d854f2577067 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -966,6 +966,18 @@ status = "disabled"; }; + sfc: spi@ff3a0000 { + compatible = "rockchip,sfc"; + reg = <0x0 0xff3a0000 0x0 0x4000>; + interrupts = ; + clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; + clock-names = "clk_sfc", "hclk_sfc"; + pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>; + pinctrl-names = "default"; + power-domains = <&power PX30_PD_MMC_NAND>; + status = "disabled"; + }; + nfc: nand-controller@ff3b0000 { compatible = "rockchip,px30-nfc"; reg = <0x0 0xff3b0000 0x0 0x4000>; @@ -1967,6 +1979,32 @@ }; }; + sfc { + sfc_bus4: sfc-bus4 { + rockchip,pins = + <1 RK_PA0 3 &pcfg_pull_none>, + <1 RK_PA1 3 &pcfg_pull_none>, + <1 RK_PA2 3 &pcfg_pull_none>, + <1 RK_PA3 3 &pcfg_pull_none>; + }; + + sfc_bus2: sfc-bus2 { + rockchip,pins = + <1 RK_PA0 3 &pcfg_pull_none>, + <1 RK_PA1 3 &pcfg_pull_none>; + }; + + sfc_cs0: sfc-cs0 { + rockchip,pins = + <1 RK_PA4 3 &pcfg_pull_none>; + }; + + sfc_clk: sfc-clk { + rockchip,pins = + <1 RK_PB1 3 &pcfg_pull_none>; + }; + }; + lcdc { lcdc_rgb_dclk_pin: lcdc-rgb-dclk-pin { rockchip,pins = -- 2.17.1