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Date:   Wed, 9 Jun 2021 15:41:54 +0200
From:   Miquel Raynal <miquel.raynal@bootlin.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Cc:     Naga Sureshkumar Relli <nagasure@xilinx.com>,
        Michal Simek <monstr@monstr.eu>,
        Amit Kumar Mahapatra <akumarma@xilinx.com>,
        Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
        Rob Herring <robh+dt@kernel.org>,
        linux-mtd@lists.infradead.org, devicetree@vger.kernel.org,
        Vignesh Raghavendra <vigneshr@ti.com>,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        helmut.grohne@intenta.de, Srinivas Goud <sgoud@xilinx.com>,
        Siva Durga Prasad Paladugu <sivadur@xilinx.com>,
        Richard Weinberger <richard@nod.at>,
        Tudor Ambarus <Tudor.Ambarus@microchip.com>
Subject: Re: [PATCH v22 15/18] MAINTAINERS: Add PL353 SMC entry
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        <20210609080112.1753221-16-miquel.raynal@bootlin.com>
        <f04b06fc-72f9-8f90-343d-e4826a3bf4d7@canonical.com>
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Hi Krzysztof,

Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote on Wed, 9
Jun 2021 15:23:11 +0200:

> On 09/06/2021 10:01, Miquel Raynal wrote:
> > Add Naga from Xilinx and myself responsible of this driver.
> > 
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > ---
> >  MAINTAINERS | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> >   
> 
> Memory controller bits look good to me, except few things in bindings. I
> can take them up to this patch, for which I would need also Ack from
> Naga Sureshkumar Relli confirming he will co-maintain this code.

Sure. I would also expect Rob to Ack the yaml conversion possibly.

I am waiting for your feedback on a couple of questions and then I will
respin the series.

> I assume the NAND driver depends on this, so I can prepare a stable tag
> with the memory controller part, if needed.

Absolutely, that would be great.

Thanks,
Miquèl