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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id r83sm320000oih.48.2021.06.09.19.54.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Jun 2021 19:54:39 -0700 (PDT) Received: (nullmailer pid 729105 invoked by uid 1000); Thu, 10 Jun 2021 02:54:38 -0000 Date: Wed, 9 Jun 2021 21:54:38 -0500 From: Rob Herring To: Joakim Zhang Cc: davem@davemloft.net, kuba@kernel.org, andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, f.fainelli@gmail.com, Jisheng.Zhang@synaptics.com, linux-imx@nxp.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH V3 net-next 1/4] dt-bindings: net: add dt binding for realtek rtl82xx phy Message-ID: <20210610025438.GA720819@robh.at.kernel.org> References: <20210608031535.3651-1-qiangqing.zhang@nxp.com> <20210608031535.3651-2-qiangqing.zhang@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210608031535.3651-2-qiangqing.zhang@nxp.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jun 08, 2021 at 11:15:32AM +0800, Joakim Zhang wrote: > Add binding for realtek rtl82xx phy. > > Signed-off-by: Joakim Zhang > --- > .../bindings/net/realtek,rtl82xx.yaml | 45 +++++++++++++++++++ > 1 file changed, 45 insertions(+) > create mode 100644 Documentation/devicetree/bindings/net/realtek,rtl82xx.yaml > > diff --git a/Documentation/devicetree/bindings/net/realtek,rtl82xx.yaml b/Documentation/devicetree/bindings/net/realtek,rtl82xx.yaml > new file mode 100644 > index 000000000000..bb94a2388520 > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/realtek,rtl82xx.yaml > @@ -0,0 +1,45 @@ > +# SPDX-License-Identifier: GPL-2.0+ > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/net/realtek,rtl82xx.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Realtek RTL82xx PHY > + > +maintainers: > + - Andrew Lunn > + - Florian Fainelli > + - Heiner Kallweit > + > +description: > + Bindings for Realtek RTL82xx PHYs > + > +allOf: > + - $ref: ethernet-phy.yaml# > + > +properties: > + realtek,clkout-disable: > + type: boolean > + description: > + Disable CLKOUT clock, CLKOUT clock default is enabled after hardware reset. > + > + Extra blank line. > + realtek,aldps-enable: > + type: boolean > + description: > + Enable ALDPS mode, ALDPS mode default is disabled after hardware reset. > + > +unevaluatedProperties: false > + > +examples: > + - | > + mdio { > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethphy1: ethernet-phy@1 { > + reg = <1>; > + realtek,clkout-disable; > + realtek,aldps-enable; The schema here will never be applied because there is nothing to match on to determine which nodes it is valid. This should have a compatible (because ethernet phys are not special). Rob