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[23.128.96.18]) by mx.google.com with ESMTP id cm2si2553174edb.457.2021.06.10.09.29.09; Thu, 10 Jun 2021 09:29:32 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231207AbhFJQ22 (ORCPT + 99 others); Thu, 10 Jun 2021 12:28:28 -0400 Received: from mail.kernel.org ([198.145.29.99]:36996 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230211AbhFJQ21 (ORCPT ); Thu, 10 Jun 2021 12:28:27 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 9B06460C40; Thu, 10 Jun 2021 16:26:31 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1lrNVl-006mHG-K1; Thu, 10 Jun 2021 17:26:29 +0100 Date: Thu, 10 Jun 2021 17:26:28 +0100 Message-ID: <87h7i5r8i3.wl-maz@kernel.org> From: Marc Zyngier To: Mark Rutland Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Will Deacon , Catalin Marinas , Alexandru Elisei , Thomas Gleixner , valentin.schneider@arm.com, kernel-team@android.com Subject: Re: [PATCH] irqchip/gic-v3: Workaround inconsistent PMR setting on NMI entry In-Reply-To: <20210610155917.GA63335@C02TD0UTHF1T.local> References: <20210610145731.1350460-1-maz@kernel.org> <20210610155917.GA63335@C02TD0UTHF1T.local> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, will@kernel.org, catalin.marinas@arm.com, alexandru.elisei@arm.com, tglx@linutronix.de, valentin.schneider@arm.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 10 Jun 2021 16:59:30 +0100, Mark Rutland wrote: > > Hi Marc, > > On Thu, Jun 10, 2021 at 03:57:31PM +0100, Marc Zyngier wrote: > > The arm64 entry code suffers from an annoying issue on taking > > a NMI, as it sets PMR to a value that actually allows IRQs > > to be acknowledged. This is done for consistency with other parts > > of the code, and is in the process of being fixed. This shouldn't > > be a problem, as we are not enabling interrupts whilst in NMI > > context. > > > > However, in the infortunate scenario that we took a spurious NMI > > (retired before the read of IAR) *and* that there is an IRQ pending > > at the same time, we'll ack the IRQ in NMI context. Too bad. > > > > In order to avoid deadlocks while running something like perf, > > teach the GICv3 driver about this situation: if we were in > > a context where no interrupt should have fired, transiently > > set PMR to a value that only allows NMIs before acking the pending > > interrupt, and restore the original value after that. > > > > This papers over the core issue for the time being, and makes > > NMIs great again. Sort of. > > > > Co-developed-by: Mark Rutland > > According to the kernel documentation, a Co-developed-by should be > immediately followed by that developer's Signed-off-by, so FWIW: > > Signed-off-by: Mark Rutland > > ... unless you want to downgrade that to a Suggested-by, which is also > fine by me! Nah, we both wasted too many grey bits on this one, and I want shared responsibility for it! > > > Signed-off-by: Marc Zyngier > > Having played about with a few options, I think this is the > simplest/cleanest thing we can do for now, and given it's all in one > place and "obviously correct", I think there's little risk that this > will break something else. So: > > Reviewed-by: Mark Rutland > > We should probably also give this: > > Fixes: 4d6a38da8e79e94c ("arm64: entry: always set GIC_PRIO_PSR_I_SET during entry") > > ... since prior to that commit the `gic_prio_irq_setup` gunk would > prevent this specific problem (though other bits like > local_daif_{save,restore}()) would be broken in NMI paths. Yup. I'll add that too and send it as a fix for -rc6. Thanks, M. -- Without deviation from the norm, progress is not possible.