Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp109182pxj; Thu, 10 Jun 2021 16:19:58 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz5fPGeytt/hzXi284QyHqx7C4GcDuX62tpJ1gvHBAnjcajyV3TtiQefe9zetvSRA4fNckX X-Received: by 2002:a17:907:990f:: with SMTP id ka15mr778955ejc.132.1623367198410; Thu, 10 Jun 2021 16:19:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623367198; cv=none; d=google.com; s=arc-20160816; b=NFWvvoCtNJEjGibyjJU4qYkvrx6Bof2/r8DsTbZDRkoIyYrXMzIQTUnSCRslwHgz7i xR4k0AvnDGqpbzNnJikD4Fp1zCHF7knJdNDmmIwT1sJr6DvwKP9S4dDMK/lcyNOXSclX so7OphUEsepX1gaL/lkHUA9B7YsjJWGdIGoMZuPWFYdSLONtMEEEwn/w7teJBy0+M+6O MLv+amEjt2ULNBc1IFxaJq71letfGUEjsCl7C0fxgRH6Lj1nd40v1a1XHnQQMRzZcvHW 113WAMfNINs8bZzEgLOAvKH3ghyB4BIoLOy2zR6SaX6Pyy/u/jDoNKBjKj+y0g9LFDDe 0Vbg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :message-id:subject:cc:to:from:date:dkim-signature; bh=ZMQB1fAfk+gS4CcUy4KNZoaA+KxrYj+EM+h8Mlfvfkw=; b=PMcZ6/LydhVQWzlNLqql8hkb4z4gOmhoCppVtLg/t4LD5A/XSQGuy0jyNPWF2U13vV QQGQgFt3crHCe9j2N5c9wVRiU7+MeQsRnxBvqw3yPdrhQB+AArkCMX9VJ7ATtcGXIsdx 2tQLjIXV7T9ap3NHQFCNlKTNOQOEj2MTuNVLmBE1OdxEQljZ+4CFvu4Qq7Rpjf2BCyqA oUAbgKLlHgoNEzmKjeUahWIrYRei/6TwPxtv5bgAKRIDUqOkUqKFm+GULXgJexhdHZGT LOaQbkfMijAkoWF4NX7GTdgNKTKcUTFjYcO6ab4MB26RUgKhprmeu828Mq/YPAiLGxis jlGA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=UzTQio7U; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id dg8si3226716edb.120.2021.06.10.16.19.33; Thu, 10 Jun 2021 16:19:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=UzTQio7U; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230336AbhFJXSP (ORCPT + 99 others); Thu, 10 Jun 2021 19:18:15 -0400 Received: from mail.kernel.org ([198.145.29.99]:50124 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230001AbhFJXSN (ORCPT ); Thu, 10 Jun 2021 19:18:13 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 9C094613E1; Thu, 10 Jun 2021 23:16:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623366976; bh=XUovVZsRI31kLc844mPjPH0FdbCw3NU/Yktf/+7780c=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=UzTQio7UDDAAp2llDejLuH2Dssj1rV/uIMpEDrT/Ssf2EW7K4RaLqk6iMZzdW+Y0o vhfxRNVTig2D5Zt0L4NTKYQua5mW19rvF6ydCBE5TaP4RD4mr8gvgBPLvgwqnVxiLb ebTa1gR+UVgexGEGg9DVtXJt/utYclmK3dg+DHgRTdPZADbQnXug/iI7HzFhIiR3n6 Cx48moeScAuQ9ugWW97U9gFIy7enNiHj3OCcLzxdJiD1qbnoKb+V3yQ/wPFQKpRoNd Br5xq5GRT05wvEH/0hxNp9QDe+c+1Tnd2MM/+skuNplNlqRdK21ne/ZqSz+ZHFRLLN vc5zm7kabTT7g== Date: Thu, 10 Jun 2021 18:16:15 -0500 From: Bjorn Helgaas To: Amey Narkhede Cc: Bjorn Helgaas , alex.williamson@redhat.com, Raphael Norwitz , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, kw@linux.com, Shanker Donthineni , Sinan Kaya , Len Brown , "Rafael J . Wysocki" Subject: Re: [PATCH v7 7/8] PCI: Enable NO_BUS_RESET quirk for Nvidia GPUs Message-ID: <20210610231615.GA2792521@bjorn-Precision-5520> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210608054857.18963-8-ameynarkhede03@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jun 08, 2021 at 11:18:56AM +0530, Amey Narkhede wrote: > From: Shanker Donthineni > > On select platforms, some Nvidia GPU devices do not work with SBR. Interesting that you say "on select platforms." Apparently SBR does work for some of these GPUs, but not on all platforms? If you have any clarification here, I can still update the commit log. > Triggering SBR would leave the device inoperable for the current > system boot. It requires a system hard-reboot to get the GPU device > back to normal operating condition post-SBR. For the affected > devices, enable NO_BUS_RESET quirk to fix the issue. > > This issue will be fixed in the next generation of hardware. > > Signed-off-by: Shanker Donthineni > Reviewed-by: Sinan Kaya This patch doesn't seem to have any dependencies or particular connection to the rest of the reset series, so I applied this patch by itself to for-linus for v5.13 and marked it for stable. If that's not right, let me know. > --- > drivers/pci/quirks.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > index e86cf4a3b..45a8c3caa 100644 > --- a/drivers/pci/quirks.c > +++ b/drivers/pci/quirks.c > @@ -3546,6 +3546,18 @@ static void quirk_no_bus_reset(struct pci_dev *dev) > dev->dev_flags |= PCI_DEV_FLAGS_NO_BUS_RESET; > } > > +/* > + * Some Nvidia GPU devices do not work with bus reset, SBR needs to be > + * prevented for those affected devices. > + */ > +static void quirk_nvidia_no_bus_reset(struct pci_dev *dev) > +{ > + if ((dev->device & 0xffc0) == 0x2340) > + quirk_no_bus_reset(dev); > +} > +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, > + quirk_nvidia_no_bus_reset); > + > /* > * Some Atheros AR9xxx and QCA988x chips do not behave after a bus reset. > * The device will throw a Link Down error on AER-capable systems and > -- > 2.31.1 >