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[23.128.96.18]) by mx.google.com with ESMTP id 5si4159908ejb.197.2021.06.10.22.58.01; Thu, 10 Jun 2021 22:58:24 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=PmstDJ+D; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230488AbhFKF6N (ORCPT + 99 others); Fri, 11 Jun 2021 01:58:13 -0400 Received: from mail.kernel.org ([198.145.29.99]:44618 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230445AbhFKF6M (ORCPT ); Fri, 11 Jun 2021 01:58:12 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id BF61D61374; Fri, 11 Jun 2021 05:56:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623390975; bh=VOKoy9LXqjs24DiLLSPKITIAEJBXmrmePJ3RmlXXJV0=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=PmstDJ+D4pwg8w7uiJ2Nnlxx6nWO6VA1/OCmmgP6yndS0TtMMiuM4gvHdiZ7u+lum iYDk2Bp5PgCjTuvVGYhe4fM3hUWvc/9tOpTG7Dwtm5RF9Ihl6s3KGCfcSE0sPZjnrm OASVT2GjToSgdVF4W/9q35vnwF2oufzCr8tz7LhSetpcNukcF3A0MPpox+9q2wLDxy pTahaM1rPVwHVvdfOVzGMtnuMP4x8vvobr787XTSswaJar0jJpOVdLf1F7Btf2eMbL WZFCTEqmIVlpuf3vO2XCvs63UBytC1OTsp+OX/RLPBoVcrJRZenoPIbE2aWlqiZnth OIYkegd/VcyRw== Date: Fri, 11 Jun 2021 11:26:06 +0530 From: Manivannan Sadhasivam To: Cristian Ciocaltea Cc: Rob Herring , Andreas =?iso-8859-1?Q?F=E4rber?= , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] ARM: dts: owl-s500-roseapplepi: Add ethernet support Message-ID: <20210611055606.GB6950@thinkpad> References: <632e12c445ced7f10e6d7240162484ae5afc148e.1623358117.git.cristian.ciocaltea@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <632e12c445ced7f10e6d7240162484ae5afc148e.1623358117.git.cristian.ciocaltea@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jun 11, 2021 at 12:09:22AM +0300, Cristian Ciocaltea wrote: > Add pinctrl configuration for enabling the Ethernet MAC on RoseapplePi > SBC. Additionally, provide the necessary properties for the generic S500 > ethernet node in order to setup PHY and MDIO. > > Signed-off-by: Cristian Ciocaltea > --- > arch/arm/boot/dts/owl-s500-roseapplepi.dts | 56 ++++++++++++++++++++++ > 1 file changed, 56 insertions(+) > > diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts > index b8c5db2344aa..bffabc7eaa50 100644 > --- a/arch/arm/boot/dts/owl-s500-roseapplepi.dts > +++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts > @@ -225,6 +225,38 @@ bias1-pinconf { > bias-pull-down; > }; > }; > + > + ethernet_pins: ethernet-pins { > + txd01-pinmux { > + groups = "rmii_txd0_mfp", "rmii_txd1_mfp"; > + function = "eth_rmii"; > + }; > + > + rxd01-pinmux { > + groups = "rmii_rxd0_mfp", "rmii_rxd1_mfp"; > + function = "eth_rmii"; > + }; > + > + txen_rxer-pinmux { > + groups = "rmii_txen_mfp", "rmii_rxen_mfp"; > + function = "eth_rmii"; > + }; > + > + crs_dv_ref_clk-pinmux { > + groups = "rmii_crs_dv_mfp", "rmii_ref_clk_mfp"; > + function = "eth_rmii"; Since the function is same, just club all the groups together. > + }; > + > + ref_clk-pinconf { > + groups = "rmii_ref_clk_drv"; > + drive-strength = <2>; > + }; > + > + phy_clk-pinmux { > + groups = "clko_25m_mfp"; > + function = "clko_25m"; > + }; Move this above node pinconf. > + }; > }; > > /* uSD */ > @@ -241,6 +273,30 @@ &mmc0 { > vqmmc-supply = <&sd_vcc>; > }; > > +ðernet { > + pinctrl-names = "default"; > + pinctrl-0 = <ðernet_pins>; > + phy-mode = "rmii"; > + phy-handle = <ð_phy>; > + status = "okay"; > + > + mdio { > + #address-cells = <1>; > + #size-cells = <0>; > + > + reset-gpios = <&pinctrl 88 GPIO_ACTIVE_LOW>; /* GPIOC24 */ > + reset-delay-us = <10000>; > + reset-post-delay-us = <150000>; reset-* properties belong to "ethernet-phy" node. Also, while adding new nodes please run the dtbs_check and try to address the warnings. Thanks, Mani > + > + eth_phy: ethernet-phy@3 { > + reg = <0x3>; > + max-speed = <100>; > + interrupt-parent = <&sirq>; > + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; > + }; > + }; > +}; > + > &twd_timer { > status = "okay"; > }; > -- > 2.32.0 >