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From:   Vignesh Raghavendra <vigneshr@ti.com>
To:     Michael Walle <michael@walle.cc>, <linux-mtd@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>
CC:     Vignesh Raghavendra <vigneshr@ti.com>,
        Tudor Ambarus <tudor.ambarus@microchip.com>,
        Pratyush Yadav <p.yadav@ti.com>,
        Miquel Raynal <miquel.raynal@bootlin.com>,
        Richard Weinberger <richard@nod.at>
Subject: Re: [PATCH v6 0/4] mtd: spi-nor: otp: 4 byte mode fix and erase support
Date:   Fri, 11 Jun 2021 17:27:51 +0530
Message-ID: <162341252747.7630.10412857264567592221.b4-ty@ti.com>
In-Reply-To: <20210607112744.21587-1-michael@walle.cc>
References: <20210607112744.21587-1-michael@walle.cc>
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On Mon, 7 Jun 2021 13:27:40 +0200, Michael Walle wrote:
> This series is the follow up on the single patch
> mtd: spi-nor: implement OTP erase for Winbond and similar flashes
> 
> Pratyush Yadav discovered a likely problem with bigger flashes, the address
> to access the security registers is either 3 or 4 byte (at least for
> winbond flashes).
> 
> [...]

Applied to spi-nor/next, thanks!
[1/4] mtd: spi-nor: otp: fix access to security registers in 4 byte mode
      https://git.kernel.org/mtd/c/b97b1a7698
[2/4] mtd: spi-nor: otp: use more consistent wording
      https://git.kernel.org/mtd/c/d5b813e484
[3/4] mtd: spi-nor: otp: return -EROFS if region is read-only
      https://git.kernel.org/mtd/c/388161ca45
[4/4] mtd: spi-nor: otp: implement erase for Winbond and similar flashes
      https://git.kernel.org/mtd/c/c6ec3e1e3a

--
Regards
Vignesh