Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp1604052pxj; Sat, 12 Jun 2021 14:04:14 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzA6kae3xgUGCdU0Z93hq7Yc6/ipzwB8Gxtz8DO6yGZ7FU/TqHiBBpF1MXuIsVRWo+UEdJ3 X-Received: by 2002:a17:906:7e4d:: with SMTP id z13mr8867132ejr.50.1623531854359; Sat, 12 Jun 2021 14:04:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623531854; cv=none; d=google.com; s=arc-20160816; b=Y+A4CPgx1OfpjFFJW0Ig4YB7RZFOcCcCvi6TJTO1Qo2nn9tkOTfNH5cJDKwgXrT6qb UpN/0bMJvAaTPwIK64/+q1DwFLKyxjtBFpWOUipGx46JD01AXXH6AQNwyNBiUvP+WdES GBx/eB3VhZruNvMt7Ovj9g4qp9f8g4LlFGK0jIu9ZOJAbZXIsKB1A4MFDc5wQa4UbddT FF5byq7SDsRFD9A+L/mfSmZ6I1mZSzkSV/qbQ88I1QAPs9KotAl3Ly8fQoPXze6lGr9B ZIDCOqv07o/wdWKmHZJnnXWEMx7eGPJmpU5NgGpD2hSL4u3XayNOAvouZ/ZcfIxXsSqu bX4Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :ironport-sdr:ironport-sdr; bh=09WE4nJZmdEtkRx4E9807bB0h98W0oQ2n0HUo+ch5PI=; b=t80iSlqvVEXY9RzuEghNEfFWrayukn4LOHwz2Rhvf7gp7hUMyG4obCMVvBpevxfqJa EhPnhQqioEXZBNpFz8nXiUPCfSuiY8v/JRiAnKVKZC25b60QU2GxPqZ7T+iR4gkm3b+p cfhov+UgcQckUYa2FlHTmQPcH1wzfLEVkwscv/PlbZPrn0KCzlYS/uwZVsuwtni1DBdb 5LToed0Fk/oj/bVuCbam78Wyyifwdoc0kYH2EsMUJgidI3UOGxVXzOmWl5S6rPFhW2Z4 FiS05GRlUbyOyxVZZtC6VibZ5mXjvA1W7uVUWJfckATOwb/QZZCvtT4pM2SQhoRMoVRo th9Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z18si7531094edd.97.2021.06.12.14.03.51; Sat, 12 Jun 2021 14:04:14 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229874AbhFLVFB (ORCPT + 99 others); Sat, 12 Jun 2021 17:05:01 -0400 Received: from mga11.intel.com ([192.55.52.93]:55380 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229753AbhFLVFA (ORCPT ); Sat, 12 Jun 2021 17:05:00 -0400 IronPort-SDR: 90RT3ENDbV6vnZwhloPoIazSZqj2+jaG9IuzF/4IQhuyUTQpHNALo8H1QXnzJUUVqPyaq/tMen uwp0h1UXo2Eg== X-IronPort-AV: E=McAfee;i="6200,9189,10013"; a="202655435" X-IronPort-AV: E=Sophos;i="5.83,268,1616482800"; d="scan'208";a="202655435" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jun 2021 14:02:53 -0700 IronPort-SDR: pFcskhteLuXgwcaDcVq7Nd6XOsItE3J+HvqX/h629rMEp4nYJL7zhXSCqQOh81yzEH4slS8h0g z7IWDFd0GBvg== X-IronPort-AV: E=Sophos;i="5.83,268,1616482800"; d="scan'208";a="451147156" Received: from rong2-mobl1.amr.corp.intel.com (HELO skuppusw-desk1.amr.corp.intel.com) ([10.254.36.179]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jun 2021 14:02:53 -0700 From: Kuppuswamy Sathyanarayanan To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Peter Zijlstra , Andy Lutomirski Cc: Peter H Anvin , Dave Hansen , Tony Luck , Dan Williams , Andi Kleen , Kirill Shutemov , Sean Christopherson , Kuppuswamy Sathyanarayanan , Kuppuswamy Sathyanarayanan , x86@kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 03/12] x86/cpufeatures: Add TDX Guest CPU feature Date: Sat, 12 Jun 2021 14:02:19 -0700 Message-Id: <20210612210219.2164766-1-sathyanarayanan.kuppuswamy@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add CPU feature detection for Trusted Domain Extensions support. TDX feature adds capabilities to keep guest register state and memory isolated from hypervisor. For TDX guest platforms, executing CPUID(eax=0x21, ecx=0) will return following values in EAX, EBX, ECX and EDX. EAX: Maximum sub-leaf number: 0 EBX/EDX/ECX: Vendor string: EBX = "Inte" EDX = "lTDX" ECX = " " So when above condition is true, set X86_FEATURE_TDX_GUEST feature cap bit. Signed-off-by: Kuppuswamy Sathyanarayanan Reviewed-by: Andi Kleen Reviewed-by: Tony Luck --- Changes since v1: * Fixed commit log issues reported by Borislav. * Moved header file include to the start of tdx.h. * Added pr_fmt for TDX. * Simplified cpuid_has_tdx_guest() implementation as per Borislav comments. arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/asm/tdx.h | 20 ++++++++++++++++++++ arch/x86/kernel/Makefile | 1 + arch/x86/kernel/head64.c | 3 +++ arch/x86/kernel/tdx.c | 29 +++++++++++++++++++++++++++++ 5 files changed, 54 insertions(+) create mode 100644 arch/x86/include/asm/tdx.h create mode 100644 arch/x86/kernel/tdx.c diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index ac37830ae941..dddc3a27cc8a 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -238,6 +238,7 @@ #define X86_FEATURE_VMW_VMMCALL ( 8*32+19) /* "" VMware prefers VMMCALL hypercall instruction */ #define X86_FEATURE_PVUNLOCK ( 8*32+20) /* "" PV unlock function */ #define X86_FEATURE_VCPUPREEMPT ( 8*32+21) /* "" PV vcpu_is_preempted function */ +#define X86_FEATURE_TDX_GUEST ( 8*32+22) /* Trusted Domain Extensions Guest */ /* Intel-defined CPU features, CPUID level 0x00000007:0 (EBX), word 9 */ #define X86_FEATURE_FSGSBASE ( 9*32+ 0) /* RDFSBASE, WRFSBASE, RDGSBASE, WRGSBASE instructions*/ diff --git a/arch/x86/include/asm/tdx.h b/arch/x86/include/asm/tdx.h new file mode 100644 index 000000000000..c738bde944d1 --- /dev/null +++ b/arch/x86/include/asm/tdx.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (C) 2020 Intel Corporation */ +#ifndef _ASM_X86_TDX_H +#define _ASM_X86_TDX_H + +#include + +#define TDX_CPUID_LEAF_ID 0x21 + +#ifdef CONFIG_INTEL_TDX_GUEST + +void __init tdx_early_init(void); + +#else + +static inline void tdx_early_init(void) { }; + +#endif /* CONFIG_INTEL_TDX_GUEST */ + +#endif /* _ASM_X86_TDX_H */ diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index 0f66682ac02a..af09ce93a641 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile @@ -126,6 +126,7 @@ obj-$(CONFIG_PARAVIRT_CLOCK) += pvclock.o obj-$(CONFIG_X86_PMEM_LEGACY_DEVICE) += pmem.o obj-$(CONFIG_JAILHOUSE_GUEST) += jailhouse.o +obj-$(CONFIG_INTEL_TDX_GUEST) += tdx.o obj-$(CONFIG_EISA) += eisa.o obj-$(CONFIG_PCSPKR_PLATFORM) += pcspeaker.o diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index de01903c3735..d1a4942ae160 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c @@ -40,6 +40,7 @@ #include #include #include +#include /* * Manage page tables very early on. @@ -491,6 +492,8 @@ asmlinkage __visible void __init x86_64_start_kernel(char * real_mode_data) kasan_early_init(); + tdx_early_init(); + idt_setup_early_handler(); copy_bootdata(__va(real_mode_data)); diff --git a/arch/x86/kernel/tdx.c b/arch/x86/kernel/tdx.c new file mode 100644 index 000000000000..70494b465392 --- /dev/null +++ b/arch/x86/kernel/tdx.c @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright (C) 2020 Intel Corporation */ + +#undef pr_fmt +#define pr_fmt(fmt) "x86/tdx: " fmt + +#include + +static inline bool cpuid_has_tdx_guest(void) +{ + u32 eax, sig[3]; + + if (cpuid_eax(0) < TDX_CPUID_LEAF_ID) + return false; + + cpuid_count(TDX_CPUID_LEAF_ID, 0, &eax, &sig[0], &sig[1], &sig[2]); + + return !memcmp("IntelTDX ", sig, 12); +} + +void __init tdx_early_init(void) +{ + if (!cpuid_has_tdx_guest()) + return; + + setup_force_cpu_cap(X86_FEATURE_TDX_GUEST); + + pr_info("Guest is initialized\n"); +} -- 2.25.1