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[23.128.96.18]) by mx.google.com with ESMTP id b3si8824986edh.532.2021.06.13.01.28.11; Sun, 13 Jun 2021 01:28:33 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231565AbhFMIZb (ORCPT + 99 others); Sun, 13 Jun 2021 04:25:31 -0400 Received: from smtp06.smtpout.orange.fr ([80.12.242.128]:45336 "EHLO smtp.smtpout.orange.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231561AbhFMIZ2 (ORCPT ); Sun, 13 Jun 2021 04:25:28 -0400 Received: from localhost.localdomain ([86.243.172.93]) by mwinf5d41 with ME id GYPS2500221Fzsu03YPSex; Sun, 13 Jun 2021 10:23:26 +0200 X-ME-Helo: localhost.localdomain X-ME-Auth: Y2hyaXN0b3BoZS5qYWlsbGV0QHdhbmFkb28uZnI= X-ME-Date: Sun, 13 Jun 2021 10:23:26 +0200 X-ME-IP: 86.243.172.93 From: Christophe JAILLET To: sathya.prakash@broadcom.com, sreekanth.reddy@broadcom.com, suganath-prabu.subramani@broadcom.com Cc: MPT-FusionLinux.pdl@broadcom.com, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, kernel-janitors@vger.kernel.org, Christophe JAILLET Subject: [PATCH 3/3] scsi: mptbase: use 'dma_set_mask_and_coherent()' to simplify code Date: Sun, 13 Jun 2021 10:23:24 +0200 Message-Id: X-Mailer: git-send-email 2.30.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Use 'dma_set_mask_and_coherent()' instead of 'dma_set_mask()/dma_set_coherent_mask()', it is less verbose. While at it, fix a typo in a comment (s/Reseting/Resetting/). Signed-off-by: Christophe JAILLET --- The code about the "1078 errata workaround" (around line 4449) looks spurious to me. Test, value of 'dma_mask' and message are all about 35 bit addressing, BUT the code uses DMA_BIT_MASK(32). Having 35 here would look more logical to me Just my 2 cents. --- drivers/message/fusion/mptbase.c | 30 ++++++++++++------------------ 1 file changed, 12 insertions(+), 18 deletions(-) diff --git a/drivers/message/fusion/mptbase.c b/drivers/message/fusion/mptbase.c index 2add74f92323..ad3f5d8a5f7c 100644 --- a/drivers/message/fusion/mptbase.c +++ b/drivers/message/fusion/mptbase.c @@ -1665,15 +1665,14 @@ mpt_mapresources(MPT_ADAPTER *ioc) if (sizeof(dma_addr_t) > 4) { const uint64_t required_mask = dma_get_required_mask (&pdev->dev); - if (required_mask > DMA_BIT_MASK(32) - && !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) - && !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) { + if (required_mask > DMA_BIT_MASK(32) && + !dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) { ioc->dma_mask = DMA_BIT_MASK(64); dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": 64 BIT PCI BUS DMA ADDRESSING SUPPORTED\n", ioc->name)); - } else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)) - && !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32))) { + } else if (!dma_set_mask_and_coherent(&pdev->dev, + DMA_BIT_MASK(32))) { ioc->dma_mask = DMA_BIT_MASK(32); dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": 32 BIT PCI BUS DMA ADDRESSING SUPPORTED\n", @@ -1684,8 +1683,7 @@ mpt_mapresources(MPT_ADAPTER *ioc) goto out_pci_release_region; } } else { - if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)) - && !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32))) { + if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32))) { ioc->dma_mask = DMA_BIT_MASK(32); dinitprintk(ioc, printk(MYIOC_s_INFO_FMT ": 32 BIT PCI BUS DMA ADDRESSING SUPPORTED\n", @@ -4451,19 +4449,17 @@ PrimeIocFifos(MPT_ADAPTER *ioc) */ if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078 && ioc->dma_mask > DMA_BIT_MASK(35)) { - if (!dma_set_mask(&ioc->pcidev->dev, DMA_BIT_MASK(32)) - && !dma_set_coherent_mask(&ioc->pcidev->dev, DMA_BIT_MASK(32))) { + if (!dma_set_mask_and_coherent(&ioc->pcidev->dev, + DMA_BIT_MASK(32))) { dma_mask = DMA_BIT_MASK(35); d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT "setting 35 bit addressing for " "Request/Reply/Chain and Sense Buffers\n", ioc->name)); } else { - /*Reseting DMA mask to 64 bit*/ - dma_set_mask(&ioc->pcidev->dev, - DMA_BIT_MASK(64)); - dma_set_coherent_mask(&ioc->pcidev->dev, - DMA_BIT_MASK(64)); + /* Resetting DMA mask to 64 bit */ + dma_set_mask_and_coherent(&ioc->pcidev->dev, + DMA_BIT_MASK(64)); printk(MYIOC_s_ERR_FMT "failed setting 35 bit addressing for " @@ -4599,8 +4595,7 @@ PrimeIocFifos(MPT_ADAPTER *ioc) } if (dma_mask == DMA_BIT_MASK(35) && - !dma_set_mask(&ioc->pcidev->dev, ioc->dma_mask) && - !dma_set_coherent_mask(&ioc->pcidev->dev, ioc->dma_mask)) + !dma_set_mask_and_coherent(&ioc->pcidev->dev, ioc->dma_mask)) d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT "restoring 64 bit addressing\n", ioc->name)); @@ -4624,8 +4619,7 @@ PrimeIocFifos(MPT_ADAPTER *ioc) } if (dma_mask == DMA_BIT_MASK(35) && - !dma_set_mask(&ioc->pcidev->dev, DMA_BIT_MASK(64)) && - !dma_set_coherent_mask(&ioc->pcidev->dev, DMA_BIT_MASK(64))) + !dma_set_mask_and_coherent(&ioc->pcidev->dev, DMA_BIT_MASK(64))) d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT "restoring 64 bit addressing\n", ioc->name)); -- 2.30.2