Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp1932413pxj; Sun, 13 Jun 2021 03:20:41 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwuTjJvoqgsDkgTTdqIJtRFKM+A0mOM9vT0b3SYYa86CSIve96N8vuM902xIT9Axcu9EZ+W X-Received: by 2002:a17:906:3b99:: with SMTP id u25mr10948834ejf.539.1623579641285; Sun, 13 Jun 2021 03:20:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623579641; cv=none; d=google.com; s=arc-20160816; b=nt21bKniopDx6f35vUQhiT7TwWf2NKuIDMIAIERF6IVYJ+UZFv2lDmcRHRPBIQEn7T QGBg3fqUgD2vLr9L216YzTdwJjPYaGCe4jkd7Xp/SO8MBhKGNC30Idd5xBorFXdRmsmy L9vW3/BA23xRajiD/+SORPYc7nD+7yl+oaWIvpLu5OgwMFj/o4ont3aFMa3jvybxkEpl pXlRxTsCv1LEDl9ttQumH6qwlv885vyDw3oAtrPkZjlcKy0EagiOnohFCm1iNEiP6KjN t5wEKufcxVDheFDe8EWITIGTUg+KOhXE6U6WCTU8s9IirPhDveM/dY+rTXk9R0hlVa/B l+iA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:to:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:from :dkim-signature; bh=gezelsziIkBudvpc6uHHK+wp2LXZn/cArU3D6EAKWkk=; b=GmC248ST/HMhM9/XzfQ+iGW6DCNXP1ftlRwUbAuFWP27EVTm2s1XKn8I9lbvvLkaDz jim7E7WX78RExdFj+tlUSBrG18P1Y2jgXgsLC5KjXO39XiplcgehV19WKljL0vVwWwJ6 K4xJE5LxCYWtvZbYRLZd9MNfFEYZFx1u9XJxwc91X1LNXfkMO+uTzvVOiDxDjiIof5tG Chp+HHtXw7COWTZcgNuf0lEFvjQhgPCr4+pbk1PsDqHFYWduWTEWi5wuk1dlzr8uofpN lrYcpPxo2nGo+Cv948oQyDjxDs2jIyg1GG7fluS8jY2Zecys1PBBoIXknUSY8T524tp4 ZDUQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=JZz4Ghji; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u23si4451622ejt.28.2021.06.13.03.20.19; Sun, 13 Jun 2021 03:20:41 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=JZz4Ghji; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231683AbhFMKVX (ORCPT + 99 others); Sun, 13 Jun 2021 06:21:23 -0400 Received: from mail-wr1-f42.google.com ([209.85.221.42]:34354 "EHLO mail-wr1-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231649AbhFMKVX (ORCPT ); Sun, 13 Jun 2021 06:21:23 -0400 Received: by mail-wr1-f42.google.com with SMTP id q5so11025057wrm.1; Sun, 13 Jun 2021 03:19:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gezelsziIkBudvpc6uHHK+wp2LXZn/cArU3D6EAKWkk=; b=JZz4GhjidC2obhF/iXHlX7TjxQDE3l1buKiwst58CdADQDoe9aUwKuWB5QYsL0bYuV yWruvSOhJgXllI1KKXkc5AtUFy/MdERp5bXMbjOoHfGOd2I6ezxhpvkbnJckBorDDnvv hxt+vuvAOtDY8o5sIQDh//zKZ7awNNPQTbc4LI1ckC1ZO/MH+9NeR+3DZyDDlwhcxfOU 9N9XYHPVuRjnKsmME0EThZK+xUDMgfULAE5ERa9r7aWEGKzfKxTOuFoHa/M9wiL/kJnJ lLxSdYe9xU3YrgY7JN2975QcBmwjSBy3dJ2faICMDZAJGx+hpXaYGn/C2xukmzrvcyQP cZYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gezelsziIkBudvpc6uHHK+wp2LXZn/cArU3D6EAKWkk=; b=WP5h4jsNfhTIg8z5bXWLKZGOY7oG9RUsgyVIFpk2y4AMj1LDRj5/Y5ZaTD+a3z75+D lxp2VNo2tr051ZFMDoW20M9k2mfYTp+Blw67K5nTz2Uv6Hz07LaHI9Caumd+nkzpf5VM Fj3A0Mz5sOnJz73urxMk3a/ViAreqoixAmZb1wht2vnOELzzOeijYkJdSwO4S8esffb1 7ryyCF43WC5cORvBh+8oGaeCcoH6NlWnh5PLABYo3TvHqQlP9uug+rQvi7Kl/WwtIoW0 GdISIJnpH1Bgu30kPmP6SKsLLjUX3uUArlTeipDPXvEyB1NGPPsB1YwxlffoTyw/zCUK d2Jw== X-Gm-Message-State: AOAM531PEHbKstXd505V2V+nCvVTjbpG5ZiXhGQ01Zng5VbXlTwf4UzO IgxMoFXv9Tx/zn36AnUcDP0VTVuq+JM= X-Received: by 2002:adf:9c93:: with SMTP id d19mr13177689wre.17.1623579501246; Sun, 13 Jun 2021 03:18:21 -0700 (PDT) Received: from cluster5 ([80.76.206.81]) by smtp.gmail.com with ESMTPSA id u15sm16679652wmq.48.2021.06.13.03.18.20 (version=TLS1 cipher=ECDHE-ECDSA-AES128-SHA bits=128/128); Sun, 13 Jun 2021 03:18:20 -0700 (PDT) From: Matthew Hagan Cc: Florian Fainelli , Vladimir Oltean , Andrew Lunn , Matthew Hagan , Rob Herring , Arnd Bergmann , Olof Johansson , soc@kernel.org, Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com, Sam Ravnborg , Krzysztof Kozlowski , Geert Uytterhoeven , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 3/4] ARM: dts: NSP: Add DT files for Meraki MX65 series Date: Sun, 13 Jun 2021 11:16:47 +0100 Message-Id: <20210613101658.3242777-4-mnhagan88@gmail.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210613101658.3242777-1-mnhagan88@gmail.com> References: <20210613101658.3242777-1-mnhagan88@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org MX65 & MX65W Hardware info: - CPU: Broadcom BCM58625 Cortex A9 @ 1200Mhz - RAM: 2 GB (4 x 4Gb SK Hynix H5TC4G83CFR) - Storage: 1 GB (Micron MT29F8G08ABACA) - Networking: BCM58625 switch (2x 1GbE ports) 2x Qualcomm QCA8337 switches (10x 1GbE ports total) - PSE: Broadcom BCM59111KMLG connected to LAN ports 11 & 12 - USB: 1x USB2.0 - Serial: Internal header - WLAN(MX65W Only): 2x Broadcom BCM43520KMLG on the PCI bus. Note that a driver and firmware image for the BCM59111 PSE has been released under GPL, but this is not present in the kernel. Signed-off-by: Matthew Hagan --- arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi | 281 ++++++++++++++++++ arch/arm/boot/dts/bcm958625-meraki-mx65.dts | 15 + arch/arm/boot/dts/bcm958625-meraki-mx65w.dts | 23 ++ 4 files changed, 321 insertions(+) create mode 100644 arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx65.dts create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx65w.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 83560b05f797..033d9604db60 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -158,6 +158,8 @@ dtb-$(CONFIG_ARCH_BCM_NSP) += \ bcm958625-meraki-mx64-a0.dtb \ bcm958625-meraki-mx64w.dtb \ bcm958625-meraki-mx64w-a0.dtb \ + bcm958625-meraki-mx65.dtb \ + bcm958625-meraki-mx65w.dtb \ bcm958625hr.dtb \ bcm988312hr.dtb \ bcm958625k.dtb diff --git a/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi b/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi new file mode 100644 index 000000000000..df5e3f3061d9 --- /dev/null +++ b/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi @@ -0,0 +1,281 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Device Tree Bindings for Cisco Meraki MX65 series (Alamo). + * + * Copyright (C) 2020-2021 Matthew Hagan + */ + +#include "bcm958625-meraki-mx6x-common.dtsi" +#include +#include + +/ { + keys { + compatible = "gpio-keys-polled"; + autorepeat; + poll-interval = <20>; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpioa 8 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + /* green:wan1-left */ + function = LED_FUNCTION_ACTIVITY; + function-enumerator = <0>; + color = ; + gpios = <&gpioa 25 GPIO_ACTIVE_LOW>; + }; + + led-1 { + /* green:wan1-right */ + function = LED_FUNCTION_ACTIVITY; + function-enumerator = <1>; + color = ; + gpios = <&gpioa 24 GPIO_ACTIVE_LOW>; + }; + + led-2 { + /* green:wan2-left */ + function = LED_FUNCTION_ACTIVITY; + function-enumerator = <2>; + color = ; + gpios = <&gpioa 27 GPIO_ACTIVE_LOW>; + }; + + led-3 { + /* green:wan2-right */ + function = LED_FUNCTION_ACTIVITY; + function-enumerator = <3>; + color = ; + gpios = <&gpioa 26 GPIO_ACTIVE_LOW>; + }; + + led-4 { + /* amber:power */ + function = LED_FUNCTION_POWER; + color = ; + gpios = <&gpioa 3 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + led-5 { + /* white:status */ + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpioa 31 GPIO_ACTIVE_HIGH>; + }; + }; + + mdio-mii-mux { + compatible = "mdio-mux-mmioreg"; + reg = <0x1803f1c0 0x4>; + mux-mask = <0x2000>; + mdio-parent-bus = <&mdio_ext>; + #address-cells = <1>; + #size-cells = <0>; + + mdio@0 { + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + phy_port6: phy@0 { + reg = <0>; + }; + + phy_port7: phy@1 { + reg = <1>; + }; + + phy_port8: phy@2 { + reg = <2>; + }; + + phy_port9: phy@3 { + reg = <3>; + }; + + phy_port10: phy@4 { + reg = <4>; + }; + + switch@10 { + compatible = "qca,qca8337"; + reg = <0x10>; + dsa,member = <1 0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + ethernet = <&sgmii1>; + phy-mode = "sgmii"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan8"; + phy-handle = <&phy_port6>; + }; + + port@2 { + reg = <2>; + label = "lan9"; + phy-handle = <&phy_port7>; + }; + + port@3 { + reg = <3>; + label = "lan10"; + phy-handle = <&phy_port8>; + }; + + port@4 { + reg = <4>; + label = "lan11"; + phy-handle = <&phy_port9>; + }; + + port@5 { + reg = <5>; + label = "lan12"; + phy-handle = <&phy_port10>; + }; + }; + }; + }; + + mdio-mii@2000 { + reg = <0x2000>; + #address-cells = <1>; + #size-cells = <0>; + + phy_port1: phy@0 { + reg = <0>; + }; + + phy_port2: phy@1 { + reg = <1>; + }; + + phy_port3: phy@2 { + reg = <2>; + }; + + phy_port4: phy@3 { + reg = <3>; + }; + + phy_port5: phy@4 { + reg = <4>; + }; + + switch@10 { + compatible = "qca,qca8337"; + reg = <0x10>; + dsa,member = <2 0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + ethernet = <&sgmii0>; + phy-mode = "sgmii"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan3"; + phy-handle = <&phy_port1>; + }; + + port@2 { + reg = <2>; + label = "lan4"; + phy-handle = <&phy_port2>; + }; + + port@3 { + reg = <3>; + label = "lan5"; + phy-handle = <&phy_port3>; + }; + + port@4 { + reg = <4>; + label = "lan6"; + phy-handle = <&phy_port4>; + }; + + port@5 { + reg = <5>; + label = "lan7"; + phy-handle = <&phy_port5>; + }; + }; + }; + }; + }; +}; + +&srab { + compatible = "brcm,bcm58625-srab", "brcm,nsp-srab"; + status = "okay"; + dsa,member = <0 0>; + + ports { + port@0 { + label = "wan1"; + reg = <0>; + }; + + port@1 { + label = "wan2"; + reg = <1>; + }; + + sgmii0: port@4 { + label = "sw0"; + reg = <4>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + sgmii1: port@5 { + label = "sw1"; + reg = <5>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@8 { + ethernet = <&amac2>; + reg = <8>; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/bcm958625-meraki-mx65.dts b/arch/arm/boot/dts/bcm958625-meraki-mx65.dts new file mode 100644 index 000000000000..a196b3053a59 --- /dev/null +++ b/arch/arm/boot/dts/bcm958625-meraki-mx65.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Device Tree Bindings for Cisco Meraki MX65. + * + * Copyright (C) 2020-2021 Matthew Hagan + */ + +/dts-v1/; + +#include "bcm958625-meraki-alamo.dtsi" + +/ { + model = "Cisco Meraki MX65"; + compatible = "meraki,mx65", "brcm,bcm58625", "brcm,nsp"; +}; diff --git a/arch/arm/boot/dts/bcm958625-meraki-mx65w.dts b/arch/arm/boot/dts/bcm958625-meraki-mx65w.dts new file mode 100644 index 000000000000..bfdaa1a6a046 --- /dev/null +++ b/arch/arm/boot/dts/bcm958625-meraki-mx65w.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Device Tree Bindings for Cisco Meraki MX65W. + * + * Copyright (C) 2020-2021 Matthew Hagan + */ + +/dts-v1/; + +#include "bcm958625-meraki-alamo.dtsi" + +/ { + model = "Cisco Meraki MX65W"; + compatible = "meraki,mx65w", "brcm,bcm58625", "brcm,nsp"; +}; + +&pcie0 { + status = "okay"; +}; + +&pcie1 { + status = "okay"; +}; -- 2.26.3