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From:   <alexandru.tachici@analog.com>
To:     <linux-clk@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <devicetree@vger.kernel.org>
CC:     <robh+dt@kernel.org>, <sboyd@kernel.org>,
        <mturquette@baylibre.com>, <petre.minciunescu@analog.com>,
        Alexandru Tachici <alexandru.tachici@analog.com>
Subject: [PATCH v2 0/2] clk: ad9545: Add support
Date:   Mon, 14 Jun 2021 10:07:16 +0300
Message-ID: <20210614070718.78041-1-alexandru.tachici@analog.com>
MIME-Version: 1.0
Content-Type: text/plain
Precedence: bulk

From: Alexandru Tachici <alexandru.tachici@analog.com>

Add support for AD9545 Quad Input, 10-Output, Dual DPLL/IEEE 1588,
1 pps Synchronizer and Jitter Cleaner.

At the core of the device there are PLL blocks. Each block consists
of one DPLL and one APLL. The DPLL can be fed timestamps from one of
the 4 reference input dividers or one of the two auxiliary NCOs.

The APLL takes the output of the DPLL and up-converts this
frequency to 1.2-2.0 GHZ. First 6 output dividers are receiving
clock from APLL0 and last 4 outputs are receiving clock from APLL1.

Current approach is to register under common clock framework,
depending whether they are mentioned in the device-tree,
any of the used references input dividers, the two auxiliary
NCOs, PLL blocks, output dividers.

A clock tree example:
Ref-B
  Ref-B-Div
    PLL0
      Q0C-div
    PLL1
      Q1A-div
      Q1B-div

Alexandru Tachici (2):
  clk: ad9545: Add support
  dt-bindings: clock: ad9545: Add documentation

Changelog v1 -> v2:
- allow uHz DPLL loop bandwidth in DT
- allow user to set different tub fill/drain rates per DPLL from DT
for improved locking detection
- added reference priorities, DPLLs now can have multiple parents selected based on
the validity of the reference in question and priority
- added fast ACQ process that can be configured in the DT
- fixed DT bindings errors
- added support for system clock compensation

 .../devicetree/bindings/clock/clk-ad9545.yaml |  556 ++++
 drivers/clk/Kconfig                           |    6 +
 drivers/clk/Makefile                          |    1 +
 drivers/clk/adi/Kconfig                       |   29 +
 drivers/clk/adi/Makefile                      |    9 +
 drivers/clk/adi/clk-ad9545-i2c.c              |   62 +
 drivers/clk/adi/clk-ad9545-spi.c              |   76 +
 drivers/clk/adi/clk-ad9545.c                  | 2428 +++++++++++++++++
 drivers/clk/adi/clk-ad9545.h                  |   16 +
 include/dt-bindings/clock/ad9545.h            |   69 +
 10 files changed, 3252 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/clk-ad9545.yaml
 create mode 100644 drivers/clk/adi/Kconfig
 create mode 100644 drivers/clk/adi/Makefile
 create mode 100644 drivers/clk/adi/clk-ad9545-i2c.c
 create mode 100644 drivers/clk/adi/clk-ad9545-spi.c
 create mode 100644 drivers/clk/adi/clk-ad9545.c
 create mode 100644 drivers/clk/adi/clk-ad9545.h
 create mode 100644 include/dt-bindings/clock/ad9545.h

--
2.25.1