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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: VE1PR04MB6688.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: a18d0e51-5508-401b-e2da-08d92fa0a720 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Jun 2021 01:55:29.2710 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: XQY9AWa6C7ZElcMF4NdeIu2rqXAPI5G5u1vqH8FjUiiY7v8RzmwCZVVVFPsTN0ds+DO4fj9VBWGXrJAaa5j5NA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB7392 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 06/11/21 21:51 Fabio Estevam wrote:=20 > Hi Robin, >=20 > On Wed, Apr 7, 2021 at 4:15 AM Robin Gong wrote: > > > > There is ecspi ERR009165 on i.mx6/7 soc family, which cause FIFO > > transfer to be send twice in DMA mode. Please get more information from= : > > https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fwww= . > > > nxp.com%2Fdocs%2Fen%2Ferrata%2FIMX6DQCE.pdf&data=3D04%7C01%7 > Cyibin.g > > > ong%40nxp.com%7Cab59d4a2e95a4351e48708d92cdffc09%7C686ea1d3bc2 > b4c6fa92 > > > cd99c5c301635%7C0%7C1%7C637590162781662129%7CUnknown%7CTWF > pbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVC > I6Mn0%3D%7C1000&sdata=3DDIbrrAYvpoJ4lKrkDJYvyoixR9DcMCgVDwuW > gI5fuVw%3D&reserved=3D0. The workaround is adding new sdma ram > script which works in XCH mode as PIO inside sdma instead of SMC mode, > meanwhile, 'TX_THRESHOLD' should be 0. The issue should be exist on all > legacy i.mx6/7 soc family before i.mx6ul. > > NXP fix this design issue from i.mx6ul, so newer chips including > > i.mx6ul/ 6ull/6sll do not need this workaroud anymore. All other > > i.mx6/7/8 chips still need this workaroud. This patch set add new > 'fsl,imx6ul-ecspi' > > for ecspi driver and 'ecspi_fixed' in sdma driver to choose if need > > errata or not. > > The first two reverted patches should be the same issue, though, it > > seems 'fixed' by changing to other shp script. Hope Sean or Sascha > > could have the chance to test this patch set if could fix their issues. > > Besides, enable sdma support for i.mx8mm/8mq and fix ecspi1 not work > > on i.mx8mm because the event id is zero. > > > > PS: > > Please get sdma firmware from below linux-firmware and copy it to > > your local rootfs /lib/firmware/imx/sdma. > > https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fgit= . > > > kernel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Ffirmware%2Flinux-fir > mw > > > are.git%2Ftree%2Fimx%2Fsdma&data=3D04%7C01%7Cyibin.gong%40nxp.c > om%7C > > > ab59d4a2e95a4351e48708d92cdffc09%7C686ea1d3bc2b4c6fa92cd99c5c301 > 635%7C > > > 0%7C1%7C637590162781662129%7CUnknown%7CTWFpbGZsb3d8eyJWIjoi > MC4wLjAwMDA > > > iLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=3DuL > %2F > > > 6w%2F7JF76dqTfKYk4BT%2F5flWr0d3U2O86ABSq2UhI%3D&reserved=3D0 >=20 > Without this series, SPI DMA does not work on i.MX8MM: >=20 > [ 41.315984] spi_master spi1: I/O Error in DMA RX >=20 > I applied your series and SPI DMA works now: >=20 > Reviewed-by: Fabio Estevam Thanks Fabio. Hello Vinod, Mark,=20 Is my patch set good enough to merge? I remember someone else are requesting it from last year like Fabio.=20