Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
MIME-Version: 1.0
References: <cover.1623780059.git.geert+renesas@glider.be> <bcc5c666f4ada9a8bbc26f559751f0da67f769f8.1623780059.git.geert+renesas@glider.be>
 <abadee118c1945c44d9bff7675b12ec4@mailhost.ics.forth.gr>
In-Reply-To: <abadee118c1945c44d9bff7675b12ec4@mailhost.ics.forth.gr>
From:   Rob Herring <robh+dt@kernel.org>
Date:   Tue, 15 Jun 2021 13:54:30 -0600
Message-ID: <CAL_JsqLU7GWDxdnR2-Yd2vbj7w=5pNr_fFocDQgPbs17EpBG0g@mail.gmail.com>
Subject: Re: [PATCH 2/3] riscv: Remove non-standard linux,elfcorehdr handling
To:     Nick Kossifidis <mick@ics.forth.gr>
Cc:     Geert Uytterhoeven <geert+renesas@glider.be>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Frank Rowand <frowand.list@gmail.com>,
        Catalin Marinas <catalin.marinas@arm.com>,
        Will Deacon <will@kernel.org>, devicetree@vger.kernel.org,
        linux-riscv <linux-riscv@lists.infradead.org>,
        linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
Precedence: bulk

On Tue, Jun 15, 2021 at 12:40 PM Nick Kossifidis <mick@ics.forth.gr> wrote:
>
> =CE=A3=CF=84=CE=B9=CF=82 2021-06-15 21:17, Geert Uytterhoeven =CE=AD=CE=
=B3=CF=81=CE=B1=CF=88=CE=B5:
> > RISC-V uses platform-specific code to locate the elf core header in
> > memory.  However, this does not conform to the standard
> > "linux,elfcorehdr" DT bindings, as it relies on a reserved memory node
> > with the "linux,elfcorehdr" compatible value, instead of on a
> > "linux,elfcorehdr" property under the "/chosen" node.
> >
> > The non-compliant code can just be removed, as the standard behavior is
> > already implemented by platform-agnostic handling in the FDT core code.
> >
> > Fixes: 5640975003d0234d ("RISC-V: Add crash kernel support")
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> NACK
>
> There is nothing standard about "linux,elfcorehdr", it's an

It is and it is documented which is more than we can say for
"linux,elfcorehdr" as a node.

> arm64-specific property on /chosen and it's suboptimal, it gets the
> addr/length of ELF core of the previous kernel through that property and
> then goes on to reserve that region at:
> https://elixir.bootlin.com/linux/v5.13-rc6/source/arch/arm64/mm/init.c#L1=
55
>
> Why on earth is this cleaner than just defining a reserved-region in the
> first place (a standard binding) with and hook up a callback with
> RESERVEDMEM_OF_DECLARE for it to also initialize elfcorehdr_addr/size ?
> If you don't like the compatible string I'm ok to change it, but this
> patch breaks kdump on riscv since that region won't be reserved any more
> and kernel will corrupt it.

I might agree if we were designing this all from scratch, but we're
not. We've got powerpc doing /memreserve/ + kernel cmdline, arm64
using chosen, and RiscV a 3rd way.

What happens when/if RiscV wants to add an IMA buffer? That's no
different than this case. The 2 architectures supporting it both use
/chosen. Specifying an initrd is no different either.

Rob