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Date:   Thu, 17 Jun 2021 15:02:24 +1000
From:   Stephen Rothwell <sfr@canb.auug.org.au>
To:     Johan Hovold <johan@kernel.org>
Cc:     Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Linux Next Mailing List <linux-next@vger.kernel.org>,
        Pho Tran <pho.tran@silabs.com>, Stefan Agner <stefan@agner.ch>,
        Tung Pham <tung.pham@silabs.com>
Subject: linux-next: manual merge of the usb-serial tree with Linus' tree
Message-ID: <20210617150224.19213166@canb.auug.org.au>
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Hi all,

Today's linux-next merge of the usb-serial tree got a conflict in:

  drivers/usb/serial/cp210x.c

between commit:

  6f7ec77cc8b6 ("USB: serial: cp210x: fix alternate function for CP2102N QF=
N20")

from Linus' tree and commit:

  8051334e901f ("USB: serial: cp210x: add support for GPIOs on CP2108")

from the usb-serial tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

--=20
Cheers,
Stephen Rothwell

diff --cc drivers/usb/serial/cp210x.c
index fcb812bc832c,3d376c0b6537..000000000000
--- a/drivers/usb/serial/cp210x.c
+++ b/drivers/usb/serial/cp210x.c
@@@ -247,12 -247,11 +247,12 @@@ struct cp210x_serial_private=20
  #ifdef CONFIG_GPIOLIB
  	struct gpio_chip	gc;
  	bool			gpio_registered;
- 	u8			gpio_pushpull;
- 	u8			gpio_altfunc;
- 	u8			gpio_input;
+ 	u16			gpio_pushpull;
+ 	u16			gpio_altfunc;
+ 	u16			gpio_input;
  #endif
  	u8			partnum;
 +	u32			fw_version;
  	speed_t			min_speed;
  	speed_t			max_speed;
  	bool			use_actual_rate;
@@@ -540,13 -579,10 +582,16 @@@ struct cp210x_quad_port_config=20
  #define CP210X_2NCONFIG_GPIO_RSTLATCH_IDX	587
  #define CP210X_2NCONFIG_GPIO_CONTROL_IDX	600
 =20
 +/* CP2102N QFN20 port configuration values */
 +#define CP2102N_QFN20_GPIO2_TXLED_MODE		BIT(2)
 +#define CP2102N_QFN20_GPIO3_RXLED_MODE		BIT(3)
 +#define CP2102N_QFN20_GPIO1_RS485_MODE		BIT(4)
 +#define CP2102N_QFN20_GPIO0_CLK_MODE		BIT(6)
 +
- /* CP210X_VENDOR_SPECIFIC, CP210X_WRITE_LATCH call writes these 0x2 bytes=
. */
+ /*
+  * CP210X_VENDOR_SPECIFIC, CP210X_WRITE_LATCH call writes these 0x02 bytes
+  * for CP2102N, CP2103, CP2104 and CP2105.
+  */
  struct cp210x_gpio_write {
  	u8	mask;
  	u8	state;

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