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[23.128.96.18]) by mx.google.com with ESMTP id ca12si6077769edb.479.2021.06.17.09.05.50; Thu, 17 Jun 2021 09:06:16 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232117AbhFQNBt (ORCPT + 99 others); Thu, 17 Jun 2021 09:01:49 -0400 Received: from mail.kernel.org ([198.145.29.99]:50366 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230137AbhFQNBs (ORCPT ); Thu, 17 Jun 2021 09:01:48 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id DCBA461351; Thu, 17 Jun 2021 12:59:40 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1ltrcP-008BDe-Ug; Thu, 17 Jun 2021 13:59:38 +0100 Date: Thu, 17 Jun 2021 13:59:37 +0100 Message-ID: <87k0msd4ue.wl-maz@kernel.org> From: Marc Zyngier To: Will Deacon Cc: Yanan Wang , Quentin Perret , Alexandru Elisei , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Catalin Marinas , James Morse , Julien Thierry , Suzuki K Poulose , Gavin Shan , wanghaibin.wang@huawei.com, zhukeqian1@huawei.com, yuzenghui@huawei.com Subject: Re: [PATCH v7 4/4] KVM: arm64: Move guest CMOs to the fault handlers In-Reply-To: <20210617124557.GB24457@willie-the-truck> References: <20210617105824.31752-1-wangyanan55@huawei.com> <20210617105824.31752-5-wangyanan55@huawei.com> <20210617124557.GB24457@willie-the-truck> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: will@kernel.org, wangyanan55@huawei.com, qperret@google.com, alexandru.elisei@arm.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, gshan@redhat.com, wanghaibin.wang@huawei.com, zhukeqian1@huawei.com, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 17 Jun 2021 13:45:57 +0100, Will Deacon wrote: > > On Thu, Jun 17, 2021 at 06:58:24PM +0800, Yanan Wang wrote: > > We currently uniformly permorm CMOs of D-cache and I-cache in function > > user_mem_abort before calling the fault handlers. If we get concurrent > > guest faults(e.g. translation faults, permission faults) or some really > > unnecessary guest faults caused by BBM, CMOs for the first vcpu are > > necessary while the others later are not. > > > > By moving CMOs to the fault handlers, we can easily identify conditions > > where they are really needed and avoid the unnecessary ones. As it's a > > time consuming process to perform CMOs especially when flushing a block > > range, so this solution reduces much load of kvm and improve efficiency > > of the stage-2 page table code. > > > > We can imagine two specific scenarios which will gain much benefit: > > 1) In a normal VM startup, this solution will improve the efficiency of > > handling guest page faults incurred by vCPUs, when initially populating > > stage-2 page tables. > > 2) After live migration, the heavy workload will be resumed on the > > destination VM, however all the stage-2 page tables need to be rebuilt > > at the moment. So this solution will ease the performance drop during > > resuming stage. > > > > Signed-off-by: Yanan Wang > > --- > > arch/arm64/kvm/hyp/pgtable.c | 38 +++++++++++++++++++++++++++++------- > > arch/arm64/kvm/mmu.c | 37 ++++++++++++++--------------------- > > 2 files changed, 46 insertions(+), 29 deletions(-) > > > > diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c > > index d99789432b05..760c551f61da 100644 > > --- a/arch/arm64/kvm/hyp/pgtable.c > > +++ b/arch/arm64/kvm/hyp/pgtable.c > > @@ -577,12 +577,24 @@ static void stage2_put_pte(kvm_pte_t *ptep, struct kvm_s2_mmu *mmu, u64 addr, > > mm_ops->put_page(ptep); > > } > > > > +static bool stage2_pte_cacheable(struct kvm_pgtable *pgt, kvm_pte_t pte) > > +{ > > + u64 memattr = pte & KVM_PTE_LEAF_ATTR_LO_S2_MEMATTR; > > + return memattr == KVM_S2_MEMATTR(pgt, NORMAL); > > +} > > + > > +static bool stage2_pte_executable(kvm_pte_t pte) > > +{ > > + return !(pte & KVM_PTE_LEAF_ATTR_HI_S2_XN); > > +} > > + > > static int stage2_map_walker_try_leaf(u64 addr, u64 end, u32 level, > > kvm_pte_t *ptep, > > struct stage2_map_data *data) > > { > > kvm_pte_t new, old = *ptep; > > u64 granule = kvm_granule_size(level), phys = data->phys; > > + struct kvm_pgtable *pgt = data->mmu->pgt; > > struct kvm_pgtable_mm_ops *mm_ops = data->mm_ops; > > > > if (!kvm_block_mapping_supported(addr, end, phys, level)) > > @@ -606,6 +618,14 @@ static int stage2_map_walker_try_leaf(u64 addr, u64 end, u32 level, > > stage2_put_pte(ptep, data->mmu, addr, level, mm_ops); > > } > > > > + /* Perform CMOs before installation of the guest stage-2 PTE */ > > + if (mm_ops->clean_invalidate_dcache && stage2_pte_cacheable(pgt, new)) > > + mm_ops->clean_invalidate_dcache(kvm_pte_follow(new, mm_ops), > > + granule); > > + > > + if (mm_ops->invalidate_icache && stage2_pte_executable(new)) > > + mm_ops->invalidate_icache(kvm_pte_follow(new, mm_ops), granule); > > One thing I'm missing here is why we need the indirection via mm_ops. Are > there cases where we would want to pass a different function pointer for > invalidating the icache? If not, why not just call the function directly? > > Same for the D side. If we didn't do that, we'd end-up having to track whether the guest context requires CMOs with additional flags, which is pretty ugly (see v5 of this series for reference [1]). It also means that we would have to drag the CM functions into the EL2 object, something that we don't need with this approach. M. [1] https://lore.kernel.org/r/20210415115032.35760-1-wangyanan55@huawei.com -- Without deviation from the norm, progress is not possible.