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[71.163.245.5]) by smtp.gmail.com with ESMTPSA id w8sm4761888qkp.136.2021.06.18.14.53.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 18 Jun 2021 14:53:12 -0700 (PDT) Subject: Re: [PATCH 2/5] thermal: qcom: Add support for LMh driver To: Bjorn Andersson Cc: agross@kernel.org, rui.zhang@intel.com, daniel.lezcano@linaro.org, viresh.kumar@linaro.org, rjw@rjwysocki.net, robh+dt@kernel.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20210608222926.2707768-1-thara.gopinath@linaro.org> <20210608222926.2707768-3-thara.gopinath@linaro.org> <4996de55-daa9-18a4-3c03-cf194d85500e@linaro.org> From: Thara Gopinath Message-ID: Date: Fri, 18 Jun 2021 17:53:11 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6/18/21 1:54 PM, Bjorn Andersson wrote: > On Mon 14 Jun 20:38 CDT 2021, Thara Gopinath wrote: >> On 6/14/21 4:53 PM, Bjorn Andersson wrote: >>> On Tue 08 Jun 17:29 CDT 2021, Thara Gopinath wrote: >>>> diff --git a/drivers/thermal/qcom/Makefile b/drivers/thermal/qcom/Makefile > [..] >>>> +static irqreturn_t lmh_handle_irq(int hw_irq, void *data) >>>> +{ >>>> + struct lmh_hw_data *lmh_data = data; >>>> + int irq = irq_find_mapping(lmh_data->domain, 0); >>>> + >>>> + /* >>>> + * Disable interrupt and call the cpufreq driver to handle the interrupt >>>> + * cpufreq will enable the interrupt once finished processing. >>>> + */ >>>> + disable_irq_nosync(lmh_data->irq); >>> >>> The contract between this driver's disabling of the IRQ and the >>> cpufreq-hw driver's enabling it when we're done polling does worry me. >>> >>> In the case of EPSS, don't we disable the interrupt during the polling >>> there as well? If that's the case wouldn't it be better to implement >>> irq_chip->irq_disable and have the cpufreq-hw driver do the disable in >>> both cases? >> >> Yes. You are right. In case of EPSS, the cpufreq-hw will have to disable the >> interrupt. I did think of the approach you suggested here. My only issue is >> that we will dispatch the interrupt to cpufreq-hw without it disabling it >> and hence the interrupt could fire again, right ? >> > > Does it fire again before you INTR_CLK it? You mean clear it ? I couldn't reproduce it either way. I did not try the irq_chip->irq_disable either. So I will give it a try and if my tests pass , I will post it. > > Regards, > Bjorn > -- Warm Regards Thara (She/Her/Hers)