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Date:   Mon, 21 Jun 2021 04:59:47 +0200
From:   Andrew Lunn <andrew@lunn.ch>
To:     Qing Zhang <zhangqing@loongson.cn>
Cc:     Giuseppe Cavallaro <peppe.cavallaro@st.com>,
        Alexandre Torgue <alexandre.torgue@foss.st.com>,
        Jose Abreu <joabreu@synopsys.com>,
        Maxime Coquelin <mcoquelin.stm32@gmail.com>,
        "David S . Miller" <davem@davemloft.net>,
        Jakub Kicinski <kuba@kernel.org>,
        Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
        Rob Herring <robh+dt@kernel.org>,
        Huacai Chen <chenhc@lemote.com>, linux-mips@vger.kernel.org,
        linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
        netdev@vger.kernel.org
Subject: Re: [PATCH 2/4] MIPS: Loongson64: Add GMAC support for
 Loongson-2K1000
Message-ID: <YNAAo+ABaMVmArcM@lunn.ch>
References: <20210618025337.5705-1-zhangqing@loongson.cn>
 <20210618025337.5705-2-zhangqing@loongson.cn>
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> +			gmac@3,1 {
> +				compatible = "pci0014,7a03.0",
> +						   "pci0014,7a03",
> +						   "pciclass0c0320",
> +						   "pciclass0c03",
> +						   "loongson, pci-gmac";
> +
> +				reg = <0x1900 0x0 0x0 0x0 0x0>;
> +				interrupts = <14 IRQ_TYPE_LEVEL_LOW>,
> +					     <15 IRQ_TYPE_LEVEL_LOW>;
> +				interrupt-names = "macirq", "eth_lpi";
> +				interrupt-parent = <&liointc0>;
> +				phy-mode = "rgmii";

rgmii? But you set PHY_INTERFACE_MODE_GMII?

> +				mdio {
> +					#address-cells = <1>;
> +					#size-cells = <0>;
> +					compatible = "snps,dwmac-mdio";
> +					phy1: ethernet-phy@1 {
> +						reg = <0>;

The value after the @ should match the reg value.

    Andrew