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Date:   Mon, 21 Jun 2021 11:17:36 +0530
From:   Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
To:     Doug Anderson <dianders@chromium.org>
Cc:     Robin Murphy <robin.murphy@arm.com>, Will Deacon <will@kernel.org>,
        Joerg Roedel <joro@8bytes.org>,
        "list@263.net:IOMMU DRIVERS , Joerg Roedel <joro@8bytes.org>," 
        <iommu@lists.linux-foundation.org>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>,
        LKML <linux-kernel@vger.kernel.org>,
        linux-arm-msm <linux-arm-msm@vger.kernel.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Krishna Reddy <vdumpa@nvidia.com>,
        Thierry Reding <treding@nvidia.com>,
        Tomasz Figa <tfiga@chromium.org>
Subject: Re: [PATCHv2 2/3] iommu/io-pgtable: Optimize partial walk flush for
 large scatter-gather list
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References: <cover.1623981933.git.saiprakash.ranjan@codeaurora.org>
 <150fc7ab1c7f9b70a95dae1f4bc3b9018c0f9e04.1623981933.git.saiprakash.ranjan@codeaurora.org>
 <CAD=FV=WA_mBnxv-D3YOYUkDAAcYgktFgnw2zeTkMneqFxBg=yg@mail.gmail.com>
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Hi,

On 2021-06-19 03:39, Doug Anderson wrote:
> Hi,
> 
> On Thu, Jun 17, 2021 at 7:51 PM Sai Prakash Ranjan
> <saiprakash.ranjan@codeaurora.org> wrote:
>> 
>> Currently for iommu_unmap() of large scatter-gather list with page 
>> size
>> elements, the majority of time is spent in flushing of partial walks 
>> in
>> __arm_lpae_unmap() which is a VA based TLB invalidation invalidating
>> page-by-page on iommus like arm-smmu-v2 (TLBIVA) which do not support
>> range based invalidations like on arm-smmu-v3.2.
>> 
>> For example: to unmap a 32MB scatter-gather list with page size 
>> elements
>> (8192 entries), there are 16->2MB buffer unmaps based on the pgsize 
>> (2MB
>> for 4K granule) and each of 2MB will further result in 512 TLBIVAs 
>> (2MB/4K)
>> resulting in a total of 8192 TLBIVAs (512*16) for 16->2MB causing a 
>> huge
>> overhead.
>> 
>> So instead use tlb_flush_all() callback (TLBIALL/TLBIASID) to 
>> invalidate
>> the entire context for partial walk flush on select few platforms 
>> where
>> cost of over-invalidation is less than unmap latency
> 
> It would probably be worth punching this description up a little bit.
> Elsewhere you said in more detail why this over-invalidation is less
> of a big deal for the Qualcomm SMMU. It's probably worth saying
> something like that here, too. Like this bit paraphrased from your
> other email:
> 
> On qcom impl, we have several performance improvements for TLB cache
> invalidations in HW like wait-for-safe (for realtime clients such as
> camera and display) and few others to allow for cache lookups/updates
> when TLBI is in progress for the same context bank.
> 

Sure will add this info as well in the next version.

> 
>> using the newly
>> introduced quirk IO_PGTABLE_QUIRK_TLB_INV_ALL. We also do this for
>> non-strict mode given its all about over-invalidation saving time on
>> individual unmaps and non-deterministic generally.
> 
> As per usual I'm mostly clueless, but I don't quite understand why you
> want this new behavior for non-strict mode. To me it almost seems like
> the opposite? Specifically, non-strict mode is already outside the
> critical path today and so there's no need to optimize it. I'm
> probably not explaining myself clearly, but I guess i'm thinking:
> 
> a) today for strict, unmap is in the critical path and it's important
> to get it out of there. Getting it out of the critical path is so
> important that we're willing to over-invalidate to speed up the
> critical path.
> 
> b) today for non-strict, unmap is not in the critical path.
> 
> So I would almost expect your patch to _disable_ your new feature for
> non-strict mappings, not auto-enable your new feature for non-strict
> mappings.
> 
> If I'm babbling, feel free to ignore. ;-) Looking back, I guess Robin
> was the one that suggested the behavior you're implementing, so it's
> more likely he's right than I am. ;-)
> 

Thanks for taking a look. Non-strict mode is only for leaf entries and
dma domains and this optimization is for non-leaf entries and is 
applicable
for both, see __arm_lpae_unmap(). In other words, if you have 
iommu.strict=0
(non-strict mode) and try unmapping a large sg buffer as the problem 
described
in the commit text, you would still go via this path in unmap and see 
the
delay without this patch. So what Robin suggested is that, let's do this
unconditionally for all users with non-strict mode as opposed to only
restricting it to implementation specific in case of strict mode.

Thanks,
Sai

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