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([2a01:e34:ed2f:f020:5ebd:8bd9:d549:4211]) by smtp.googlemail.com with ESMTPSA id 24sm4377077wmi.35.2021.06.21.02.25.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 21 Jun 2021 02:25:48 -0700 (PDT) Subject: Re: [PATCH 1/2] clocksource/drivers/exynos_mct: Prioritise Arm arch timer on arm64 To: Will Deacon , Chanwoo Choi Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Marek Szyprowski , Krzysztof Kozlowski , Krzysztof Kozlowski , Thomas Gleixner References: <20210608154341.10794-1-will@kernel.org> <20210608154341.10794-2-will@kernel.org> <466bfc19-2260-87c6-c458-b43cf23617e3@samsung.com> <2a0181ea-a26e-65e9-16f6-cc233b6b296f@linaro.org> <20210617214748.GC25403@willie-the-truck> From: Daniel Lezcano Message-ID: Date: Mon, 21 Jun 2021 11:25:47 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20210617214748.GC25403@willie-the-truck> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 17/06/2021 23:47, Will Deacon wrote: > On Thu, Jun 17, 2021 at 09:58:35AM +0900, Chanwoo Choi wrote: >> On 6/17/21 12:25 AM, Daniel Lezcano wrote: >>> On 10/06/2021 03:03, Chanwoo Choi wrote: >>>> On 6/9/21 12:43 AM, Will Deacon wrote: >>>>> diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c >>>>> index fabad79baafc..804d3e01c8f4 100644 >>>>> --- a/drivers/clocksource/exynos_mct.c >>>>> +++ b/drivers/clocksource/exynos_mct.c >>>>> @@ -51,6 +51,15 @@ >>>>> >>>>> #define TICK_BASE_CNT 1 >>>>> >>>>> +#ifdef CONFIG_ARM >>>>> +/* Use values higher than ARM arch timer. See 6282edb72bed. */ >>>>> +#define MCT_CLKSOURCE_RATING 450 >>>>> +#define MCT_CLKEVENTS_RATING 500 >>>>> +#else >>>>> +#define MCT_CLKSOURCE_RATING 350 >>>>> +#define MCT_CLKEVENTS_RATING 350 >>>>> +#endif >>>>> + >>>>> enum { >>>>> MCT_INT_SPI, >>>>> MCT_INT_PPI >>>>> @@ -206,7 +215,7 @@ static void exynos4_frc_resume(struct clocksource *cs) >>>>> >>>>> static struct clocksource mct_frc = { >>>>> .name = "mct-frc", >>>>> - .rating = 450, /* use value higher than ARM arch timer */ >>>>> + .rating = MCT_CLKSOURCE_RATING, >>>>> .read = exynos4_frc_read, >>>>> .mask = CLOCKSOURCE_MASK(32), >>>>> .flags = CLOCK_SOURCE_IS_CONTINUOUS, >>>>> @@ -457,7 +466,7 @@ static int exynos4_mct_starting_cpu(unsigned int cpu) >>>>> evt->set_state_oneshot_stopped = set_state_shutdown; >>>>> evt->tick_resume = set_state_shutdown; >>>>> evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; >>>>> - evt->rating = 500; /* use value higher than ARM arch timer */ >>>>> + evt->rating = MCT_CLKEVENTS_RATING, >>>>> >>>>> exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET); >>>>> >>>>> >>>> >>>> I'm not sure that exynos mct is working without problem >>>> such as the case of 6282edb72bed. >>>> As described on On ,6282edb72bed the arch timer on exynos SoC >>>> depends on Exynos MCT device. the arch timer is not able to work >>>> without Exynos MCT because of using the common module. >>> >>> Is it possible to change the DT to have a phandle to the exynos_mct, so >>> it will be probed before the arch_arm_timer ? >> >> I think that DT changes is not proper way to keep the order between >> exynos_mct and arch timer. > > exynos4_mct_frc_start() is called unconditionally from probe via > exynos4_clocksource_init() so as long as the mct probes first, then the > arch timer should work, no? The rating shouldn't affect that. How do you ensure the exynos mct is probed before the arch timer ? The Makefile provides the right order, but the dependency is implicit. -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog