Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp3824660pxj; Mon, 21 Jun 2021 07:25:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzRuirBr2waJHN8+SPfBlZfJeUYFp0jr0p0bmVrGQLQC4xe8l+fIdNr14CEtgzmbjZhy7KN X-Received: by 2002:a92:8e45:: with SMTP id k5mr10715563ilh.116.1624285515191; Mon, 21 Jun 2021 07:25:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624285515; cv=none; d=google.com; s=arc-20160816; b=cC7BT6PPYiE+KyL86lBYGLTxVZamzny2b7oinnbg/aTXpRD/0YaGlZHsEjF1/YsYQu o47XQrnpIpD+C1tVoUTLf/mAfWdghbcpWQuCCT40RSBqwD99gtm/e0ElBgen8ZIdOgJC rRJEQDuYFFFiP2UamIPk0wieEVurDG3Z75i7z8eMXOBU5RiB1WF2BpfkHqzKe0olLL6t XuWO7aLrmKc3rOfYJGe9xJw86Xjzs6Okh5Y/mq7irSuVtnuxwRc6NbIujHPoFPbATCWj 6Hv+fADmG0/B6abjxS9NsZv3aO42YEPdoK/uOLpWEYMkd0V9cAI1qz8A4hSMHflYOLXR rV+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:user-agent:in-reply-to:content-transfer-encoding :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=hl/TSUWRRKrhHOVnAUBC1MnODui9l7sJm9ERDIbOeK0=; b=LF5+vJmX5N5x3q6LHsh/5NBqJhQAnfpHDcOe/38KTvXrON/cx9Y3RA6DRuJTy4ZavL p4StMAtb6E3PJy8OPgT82cfviSDzK+KwnrTMfKhVWU+OGRanaHPXmy1a+nTd6lmf096x 5AyiKAWZfVJwQ/ddZ5i7uDEi3YLs2eIIFqfezshgKqJkPgxMH+oCHLDEAsuqKWsOtB0E K8HXFvnafC9ZuU98rTWu7QQ0OLS9Mmtjtu/3l0+ZSaQ1NX0hk2aYROhxRhzrMjop3vEx 1fP/0i0YsORAKGxYP6xRHAWDizAKJ2Rc5/5IGaFYwJyB6zDY25dHBqzEs1fnc6qVHgPi HX+Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t14si10019148jan.114.2021.06.21.07.25.03; Mon, 21 Jun 2021 07:25:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229765AbhFUO0f (ORCPT + 99 others); Mon, 21 Jun 2021 10:26:35 -0400 Received: from foss.arm.com ([217.140.110.172]:35400 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229747AbhFUO0c (ORCPT ); Mon, 21 Jun 2021 10:26:32 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DE8FBD6E; Mon, 21 Jun 2021 07:24:17 -0700 (PDT) Received: from lpieralisi (e121166-lin.cambridge.arm.com [10.1.196.255]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8C9C93F694; Mon, 21 Jun 2021 07:24:16 -0700 (PDT) Date: Mon, 21 Jun 2021 15:24:14 +0100 From: Lorenzo Pieralisi To: Richard Zhu Cc: l.stach@pengutronix.de, kw@linux.com, bhelgaas@google.com, stefan@agner.ch, linux-pci@vger.kernel.org, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de Subject: Re: [PATCH v2] PCI: imx6: Limit DBI register length for imx6qp PCIe Message-ID: <20210621142414.GB27516@lpieralisi> References: <1613789388-2495-1-git-send-email-hongxing.zhu@nxp.com> <1613789388-2495-2-git-send-email-hongxing.zhu@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1613789388-2495-2-git-send-email-hongxing.zhu@nxp.com> User-Agent: Mutt/1.9.4 (2018-02-28) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Feb 20, 2021 at 10:49:48AM +0800, Richard Zhu wrote: > Define the length of the DBI registers and limit config space to its > length. This makes sure that the kernel does not access registers beyond > that point that otherwise would lead to an abort on the i.MX 6QuadPlus. > > See commit 075af61c19cd ("PCI: imx6: Limit DBI register length") that > resolves a similar issue on the i.MX 6Quad PCIe. > > Signed-off-by: Richard Zhu > Reviewed-by: Lucas Stach > Reviewed-by: Krzysztof WilczyƄski > --- > drivers/pci/controller/dwc/pci-imx6.c | 1 + > 1 file changed, 1 insertion(+) I'd like to merge this patch since I believe it is still required, please let me know if that's not the case. Lorenzo > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 0cf1333c0440..853ea8e82952 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -1175,6 +1175,7 @@ static const struct imx6_pcie_drvdata drvdata[] = { > .variant = IMX6QP, > .flags = IMX6_PCIE_FLAG_IMX6_PHY | > IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE, > + .dbi_length = 0x200, > }, > [IMX7D] = { > .variant = IMX7D, > -- > 2.17.1 >