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From:   Johan Jonker <jbx6244@gmail.com>
Subject: Re: [PATCH v5 3/4] arm64: dts: rockchip: add core dtsi for RK3568 SoC
To:     cl@rock-chips.com, heiko@sntech.de
Cc:     robh+dt@kernel.org, jagan@amarulasolutions.com, wens@csie.org,
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References: <20210622020517.13100-1-cl@rock-chips.com>
 <20210622020517.13100-4-cl@rock-chips.com>
Message-ID: <9515154d-f521-217c-af61-7cda089fbf15@gmail.com>
Date:   Tue, 22 Jun 2021 12:37:07 +0200
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Hi Chris, Heiko,

On 6/22/21 4:05 AM, cl@rock-chips.com wrote:
> From: Liang Chen <cl@rock-chips.com>
> 
> RK3568 is a high-performance and low power quad-core application processor
> designed for personal mobile internet device and AIoT equipment. This patch
> add basic core dtsi file for it.
> 
> We use scmi_clk for cortex-a55 instead of standard ARMCLK, so that
> kernel/uboot/rtos can change cpu clk with the same code in ATF, and we will
> enalbe a special high-performance PLL when high frequency is required. The
> smci_clk code is in ATF, and clkid for cpu is 0, as below:
> 
>     cpu0: cpu@0 {
>         device_type = "cpu";
>         compatible = "arm,cortex-a55";
>         reg = <0x0 0x0>;
>         clocks = <&scmi_clk 0>;
>     };
> 
> Signed-off-by: Liang Chen <cl@rock-chips.com>
> ---
>  .../boot/dts/rockchip/rk3568-pinctrl.dtsi     | 3111 +++++++++++++++++
>  arch/arm64/boot/dts/rockchip/rk3568.dtsi      |  777 ++++
>  2 files changed, 3888 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi
>  create mode 100644 arch/arm64/boot/dts/rockchip/rk3568.dtsi
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi
> new file mode 100644
> index 000000000000..a588ca95ace2
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi
> @@ -0,0 +1,3111 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
> + */
> +
> +#include <dt-bindings/pinctrl/rockchip.h>

> +#include "rockchip-pinconf.dtsi"

Question for Heiko:

This file is put in the arm64 directory.
Is it useful for ARM as well?
Should the ARM directory have it's own or use a long include?

ARM:
#include "../../../arm64/boot/dts/rockchip/rockchip-pinconf.dtsi"

arm64:
#include "rockchip-pinconf.dtsi"

Is it complete or does it need more items?
(Who's going to change that?)

arch/arm/boot/dts/rk3066a.dtsi:373.23-375.6: ERROR (phandle_references):
/pinctrl/emmc/emmc-clk: Reference to non-existent node or label
"pcfg_pull_default"

arch/arm/boot/dts/rv1108.dtsi:645.25-654.6: ERROR (phandle_references):
/pinctrl/emmc/emmc-bus8: Reference to non-existent node or label
"pcfg_pull_up_drv_8ma"

arch/arm64/boot/dts/rockchip/px30.dtsi:1470.23-1473.6: ERROR
(phandle_references): /pinctrl/spi0/spi0-clk: Reference to non-existent
node or label "pcfg_pull_up_4ma"

arch/arm64/boot/dts/rockchip/px30.dtsi:1490.29-1493.6: ERROR
(phandle_references): /pinctrl/spi0/spi0-clk-hs: Reference to
non-existent node or label "pcfg_pull_up_8ma"

arch/arm64/boot/dts/rockchip/px30.dtsi:1589.39-1592.6: ERROR
(phandle_references): /pinctrl/pdm/pdm-clk0m0-sleep: Reference to
non-existent node or label "pcfg_input_high"

arch/arm64/boot/dts/rockchip/px30.dtsi:1903.49-1906.6: ERROR
(phandle_references): /pinctrl/lcdc/lcdc-rgb-m0-hsync-pin: Reference to
non-existent node or label "pcfg_pull_none_12ma"

etc..

> +
> +/*
> + * This file is auto generated by pin2dts tool, please keep these code
> + * by adding changes at end of this file.
> + */
> +&pinctrl {

[..]