Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Date:   Tue, 22 Jun 2021 13:30:53 +0100
From:   Paul Cercueil <paul@opendingux.net>
Subject: Re: [PATCH 1/4] MIPS: X1830: Respect cell count of common properties.
To:     =?UTF-8?b?5ZGo55Cw5p2w?= <zhouyanjie@wanyeetech.com>
Cc:     tsbogend@alpha.franken.de, robh+dt@kernel.org,
        linux-mips@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, dongsheng.qiu@ingenic.com,
        aric.pzqi@ingenic.com, rick.tyliu@ingenic.com,
        sihui.liu@ingenic.com, jun.jiang@ingenic.com,
        sernia.zhou@foxmail.com
Message-Id: <H3S3VQ.BEEIRETNG80B@opendingux.net>
In-Reply-To: <1624347445-88070-2-git-send-email-zhouyanjie@wanyeetech.com>
References: <1624347445-88070-1-git-send-email-zhouyanjie@wanyeetech.com>
        <1624347445-88070-2-git-send-email-zhouyanjie@wanyeetech.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: quoted-printable
Precedence: bulk

Hi Zhou,

Le mar., juin 22 2021 at 15:37:22 +0800, =E5=91=A8=E7=90=B0=E6=9D=B0 (Zhou =
Yanjie)=20
<zhouyanjie@wanyeetech.com> a =C3=A9crit :
> If N fields of X cells should be provided, then that's what the
> devicetree should represent, instead of having one single field of
> (N * X) cells.
>=20
> Signed-off-by: =E5=91=A8=E7=90=B0=E6=9D=B0 (Zhou Yanjie) <zhouyanjie@wany=
eetech.com>

Acked-by: Paul Cercueil <paul@crapouillou.net>

-Paul

> ---
>  arch/mips/boot/dts/ingenic/x1830.dtsi | 9 ++++-----
>  1 file changed, 4 insertions(+), 5 deletions(-)
>=20
> diff --git a/arch/mips/boot/dts/ingenic/x1830.dtsi=20
> b/arch/mips/boot/dts/ingenic/x1830.dtsi
> index b21c930..59ca3a8 100644
> --- a/arch/mips/boot/dts/ingenic/x1830.dtsi
> +++ b/arch/mips/boot/dts/ingenic/x1830.dtsi
> @@ -97,9 +97,9 @@
>=20
>  		#clock-cells =3D <1>;
>=20
> -		clocks =3D <&cgu X1830_CLK_RTCLK
> -			  &cgu X1830_CLK_EXCLK
> -			  &cgu X1830_CLK_PCLK>;
> +		clocks =3D <&cgu X1830_CLK_RTCLK>,
> +			 <&cgu X1830_CLK_EXCLK>,
> +			 <&cgu X1830_CLK_PCLK>;
>  		clock-names =3D "rtc", "ext", "pclk";
>=20
>  		interrupt-controller;
> @@ -274,8 +274,7 @@
>=20
>  	pdma: dma-controller@13420000 {
>  		compatible =3D "ingenic,x1830-dma";
> -		reg =3D <0x13420000 0x400
> -			   0x13421000 0x40>;
> +		reg =3D <0x13420000 0x400>, <0x13421000 0x40>;
>  		#dma-cells =3D <2>;
>=20
>  		interrupt-parent =3D <&intc>;
> --
> 2.7.4
>=20