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Date:   Tue, 22 Jun 2021 17:18:05 +0200
From:   Stephan Gerhold <stephan@gerhold.net>
To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@somainline.org>
Cc:     bjorn.andersson@linaro.org, agross@kernel.org,
        daniel.lezcano@linaro.org, rjw@rjwysocki.net,
        linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
        linux-arm-msm@vger.kernel.org, phone-devel@vger.kernel.org,
        konrad.dybcio@somainline.org, marijn.suijten@somainline.org,
        martin.botka@somainline.org, jeffrey.l.hugo@gmail.com,
        jami.kettunen@somainline.org,
        ~postmarketos/upstreaming@lists.sr.ht, devicetree@vger.kernel.org,
        robh+dt@kernel.org
Subject: Re: [PATCH v7 4/5] soc: qcom: spm: Add compatible for MSM8998
 SAWv4.1 L2
Message-ID: <YNH/LREbpP4ycT7l@gerhold.net>
References: <20210622141117.358893-1-angelogioacchino.delregno@somainline.org>
 <20210622141117.358893-5-angelogioacchino.delregno@somainline.org>
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On Tue, Jun 22, 2021 at 04:11:16PM +0200, AngeloGioacchino Del Regno wrote:
> Add the SAWv4.1 parameters for MSM8998's Gold and Silver clusters.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>

I can't say much about this platform but I trust that Angelo
knows what he is doing. :) I found the values used here in

https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/msm8998-pm.dtsi?h=994e5922a0c225b877a4b3790830b7edc7b7807b
https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/msm8998-v2.dtsi?h=994e5922a0c225b877a4b3790830b7edc7b7807b#n1186

(From what I heard from other people only msm8998-v2 is used in
 production devices?)

So I think it's okay to provide a (somewhat limited)
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>

> ---
>  drivers/soc/qcom/spm.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/drivers/soc/qcom/spm.c b/drivers/soc/qcom/spm.c
> index 1401db8373dd..8077e337ee7e 100644
> --- a/drivers/soc/qcom/spm.c
> +++ b/drivers/soc/qcom/spm.c
> @@ -54,6 +54,18 @@ static const struct spm_reg_data spm_reg_660_silver_l2  = {
>  	.avs_limit = 0x4580458,
>  };
>  
> +static const struct spm_reg_data spm_reg_8998_gold_l2  = {
> +	.reg_offset = spm_reg_offset_v4_1,
> +	.avs_ctl = 0x1010031,
> +	.avs_limit = 0x4700470,
> +};
> +
> +static const struct spm_reg_data spm_reg_8998_silver_l2  = {
> +	.reg_offset = spm_reg_offset_v4_1,
> +	.avs_ctl = 0x1010031,
> +	.avs_limit = 0x4200420,
> +};
> +
>  static const u16 spm_reg_offset_v2_1[SPM_REG_NR] = {
>  	[SPM_REG_CFG]		= 0x08,
>  	[SPM_REG_SPM_CTL]	= 0x30,
> @@ -149,6 +161,10 @@ static const struct of_device_id spm_match_table[] = {
>  	  .data = &spm_reg_660_gold_l2 },
>  	{ .compatible = "qcom,sdm660-silver-saw2-v4.1-l2",
>  	  .data = &spm_reg_660_silver_l2 },
> +	{ .compatible = "qcom,msm8998-gold-saw2-v4.1-l2",
> +	  .data = &spm_reg_8998_gold_l2 },
> +	{ .compatible = "qcom,msm8998-silver-saw2-v4.1-l2",
> +	  .data = &spm_reg_8998_silver_l2 },
>  	{ .compatible = "qcom,msm8974-saw2-v2.1-cpu",
>  	  .data = &spm_reg_8974_8084_cpu },
>  	{ .compatible = "qcom,apq8084-saw2-v2.1-cpu",
> -- 
> 2.32.0
>