Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp4823583pxj; Tue, 22 Jun 2021 08:46:29 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxXbBhWGDzcxtbccXQtiRRLRXFPfDoklGQC7ycJ4OxskA/DxP1ryfaIWSbNfCWtgpBaLG9f X-Received: by 2002:a17:906:cc87:: with SMTP id oq7mr4701092ejb.193.1624376788748; Tue, 22 Jun 2021 08:46:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624376788; cv=none; d=google.com; s=arc-20160816; b=msDkPTR9fvaNyuBxOYROoslKzgLnMmhsQ06WxGEfFRqB+IL3DDLGQ0wpt4inDhZX04 Wgb8e7Ipnk2yJpT2m9sL1XQMAY5HX/4R6+4JzQy+VQxWZ0flURblYnzx1S8NNDXjmXl8 NfI8oVFTrH2xzHYE6nem1gZS8KKkK1PWk4ts03sdjPtxqlOjPxyD2CIaMaAoRFTR1I/2 KSugMWQRMtcuLyIv10FqQL9LZHJh7BmptP+Czk5V5HjiN9aSq9DugJK1zo/dh+2wmP7I DgaL6TzrIX4xDvhpFr613uF6szvWy3oEKkCce7vrQE+DSCYfIGY8lpoZwRHXMetOB4pI SRsQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=NmgGBp1MvQ3QZLdR3rSFHJ62lrt9ZCeoazC8kvbeEcI=; b=btx3Yk3oJYBDzudRyn+njYAse3/+Xp4oSjotlsaHWb0O8V2ht/tKnI9maORW6PEhKU k2fygWjPlT3NM5D5LCYBn1Ft4c5ny/JRVMiDFYPDRqaqnL2NplvpFgYsLl1n+AjuaSL/ YyaLLF8lHp3CgoTSAM9OOtUIpKHsoVxv0C/TdJYoQLxLKTT/tlpBPn+YaKibnYhIwiFV NnFZbf6iWKCzCO+4pdR53MevPT2SZ+pNAOl1cciZrQ3LX0EWpVURHZqA9EHAq7mazn7q ctS2rEUNi/TfrRTBLwmGT9Em7nGxDJ08W1nQ0P3cQ81godCQhB8wF9QqXxLZbEkWWnB3 bu/A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id w6si14865835ejf.324.2021.06.22.08.46.05; Tue, 22 Jun 2021 08:46:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232240AbhFVPrI (ORCPT + 99 others); Tue, 22 Jun 2021 11:47:08 -0400 Received: from foss.arm.com ([217.140.110.172]:51572 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231876AbhFVPrH (ORCPT ); Tue, 22 Jun 2021 11:47:07 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C68A031B; Tue, 22 Jun 2021 08:44:51 -0700 (PDT) Received: from e123427-lin.arm.com (unknown [10.57.45.237]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C5BDC3F718; Tue, 22 Jun 2021 08:44:49 -0700 (PDT) From: Lorenzo Pieralisi To: linux-pci@vger.kernel.org, =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , linux-kernel@vger.kernel.org, Ray Jui , Rob Herring , Scott Branden , Sandor Bodo-Merle , linux-arm-kernel@lists.infradead.org, Bjorn Helgaas , bcm-kernel-feedback-list@broadcom.com Cc: Lorenzo Pieralisi , Marc Zyngier , Ray Jui , =?UTF-8?q?Pali=20Roh=C3=A1r?= Subject: Re: [PATCH v2 1/2] PCI: iproc: Fix multi-MSI base vector number allocation Date: Tue, 22 Jun 2021 16:44:45 +0100 Message-Id: <162437667135.7609.9525971996203421958.b4-ty@arm.com> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20210622152630.40842-1-sbodomerle@gmail.com> References: <20210621144702.GD27516@lpieralisi> <20210622152630.40842-1-sbodomerle@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 22 Jun 2021 17:26:29 +0200, Sandor Bodo-Merle wrote: > Commit fc54bae28818 ("PCI: iproc: Allow allocation of multiple MSIs") > introduced multi-MSI support with a broken allocation mechanism (it failed > to reserve the proper number of bits from the inner domain). Natural > alignment of the base vector number was also not guaranteed. Applied to pci/iproc, thanks! [1/2] PCI: iproc: Fix multi-MSI base vector number allocation https://git.kernel.org/lpieralisi/pci/c/e673d697b9 [2/2] PCI: iproc: Support multi-MSI only on uniprocessor kernel https://git.kernel.org/lpieralisi/pci/c/2dc0a201d0 Thanks, Lorenzo