Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
From:   Paul Davey <paul.davey@alliedtelesis.co.nz>
To:     Manivannan Sadhasivam <mani@kernel.org>
Cc:     linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
        Bhaumik Bhatt <bbhatt@codeaurora.org>,
        Hemant Kumar <hemantk@codeaurora.org>,
        Paul Davey <paul.davey@alliedtelesis.co.nz>
Subject: [PATCH v2 0/2] bus: mhi: Fix MHI on big endian architectures
Date:   Wed, 23 Jun 2021 14:43:25 +1200
Message-Id: <20210623024327.15029-1-paul.davey@alliedtelesis.co.nz>
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
Precedence: bulk

I encountered some problems getting the MHI driver to work on an Octeon
3 platform these seem to all be related to endianness issues.  The modem
interface appears to require the DMA structures to be in little endian,
however the MHI core driver was assembling them in native endianness.

Using little endian explicitly allows the interface to function as
expected.

Changes in v2:
  - use __fls instead of find_last_bit in pm_state conversion patch as
    requested by Hemant Kumar <hemantk@codeaurora.org>

Paul Davey (2):
  bus: mhi: Fix pm_state conversion to string
  bus: mhi: Fix MHI DMA structure endianness

 drivers/bus/mhi/core/debugfs.c  |  26 +++----
 drivers/bus/mhi/core/init.c     |  43 ++++++-----
 drivers/bus/mhi/core/internal.h | 129 ++++++++++++++++----------------
 drivers/bus/mhi/core/main.c     |  36 ++++-----
 drivers/bus/mhi/core/pm.c       |   8 +-
 5 files changed, 124 insertions(+), 118 deletions(-)

--=20
2.32.0