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Wed, 23 Jun 2021 08:19:41 +0000 From: "Tian, Kevin" To: Jason Gunthorpe , Jean-Philippe Brucker CC: David Gibson , LKML , Joerg Roedel , Lu Baolu , David Woodhouse , "iommu@lists.linux-foundation.org" , "kvm@vger.kernel.org" , "Alex Williamson (alex.williamson@redhat.com)" , Jason Wang , Eric Auger , Jonathan Corbet , "Raj, Ashok" , "Liu, Yi L" , "Wu, Hao" , "Jiang, Dave" , Jacob Pan , "Kirti Wankhede" , Robin Murphy Subject: RE: [RFC] /dev/ioasid uAPI proposal Thread-Topic: [RFC] /dev/ioasid uAPI proposal Thread-Index: AddSzQ97BhCb3gd8AUyldaDZ6yOMNABLsqGAAN/dRYAAFU5FAAAaxTKAADwI6AAAwQ1+AAB5vHCAAUN/JAAAT74kgAADDUUAAOVz9OA= Date: Wed, 23 Jun 2021 08:19:40 +0000 Message-ID: References: <20210528195839.GO1002214@nvidia.com> <20210602165838.GA1002214@nvidia.com> <20210618183054.GK1002214@nvidia.com> In-Reply-To: <20210618183054.GK1002214@nvidia.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-version: 11.5.1.3 dlp-product: dlpe-windows dlp-reaction: no-action authentication-results: nvidia.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MWHPR11MB1886.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3ce49a85-44cf-4ee5-b117-08d9361fa637 X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Jun 2021 08:19:40.8550 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: uK1zzI4yf29/QiW7det7duXHaGa91Zr+L8H4R5UOIwoVniuY5LHtvQawLhGq7lRxLZxre+0jq1ASsPsqpJgm2w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR11MB1520 X-OriginatorOrg: intel.com Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > From: Jason Gunthorpe > Sent: Saturday, June 19, 2021 2:31 AM >=20 > On Fri, Jun 18, 2021 at 07:03:31PM +0200, Jean-Philippe Brucker wrote: >=20 > > configuration. The Arm SMMUs have a lot of small features that > > implementations can mix and match and that a user shouldn't have to car= e > > about, and there are lots of different implementations by various > > vendors. >=20 > This is really something to think about carefully in this RFC - I do > have a guess that a 'HW specific' channel is going to be useful here. Agree. >=20 > If the goal is for qemu to provide all these fiddly things and they > cannot be SW emulated, then direct access to the fiddly HW native > stuff is possibly necessary. >=20 > We've kind of seen this mistake in DRM and RDMA > historically. Attempting to generalize too early, or generalize > something that is really a one off. Better for everyone to just keep > it as a one off. >=20 Yes. Except some generic info (e.g. addr_width), most format info can=20 be exposed via a vendor specific data union region. There is no need=20 to define those vendor bits explicitly in the uAPI. Kernel IOMMU driver=20 and vIOMMU emulation logic know how to interpret them.=20 Take VT-d for example, all format/cap info are carried in two registers (cap_reg and ecap_reg) thus two u64 fields are sufficient...=20 Thanks Kevin