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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id b10sm13449981edx.4.2021.06.23.05.53.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 23 Jun 2021 05:53:24 -0700 (PDT) Subject: Re: [PATCH] arm64: dts: rockchip: Add sdmmc_ext for RK3328 To: Alex Bee , Heiko Stuebner Cc: Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org References: <20210623120001.164920-1-knaerzche@gmail.com> From: Johan Jonker Message-ID: Date: Wed, 23 Jun 2021 14:53:22 +0200 User-Agent: Mozilla/5.0 (X11; Linux i686; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: <20210623120001.164920-1-knaerzche@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Alex, make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml On 6/23/21 2:00 PM, Alex Bee wrote: > RK3328 SoC has a fourth mmc controller called SDMMC_EXT. Some > boards have sdio wifi connected to it. In order to use it > one would have to add the pinctrls from sdmmc0ext group which > is done on board level. > > While at that also add the reset controls for the other mmc > controllers. > > Signed-off-by: Alex Bee > --- > arch/arm64/boot/dts/rockchip/rk3328.dtsi | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi > index da84be6f4715..c13fa2f3f4cd 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi > @@ -858,6 +858,8 @@ sdmmc: mmc@ff500000 { > clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; > fifo-depth = <0x100>; > max-frequency = <150000000>; > + resets = <&cru SRST_MMC0>; > + reset-names = "reset"; > status = "disabled"; > }; > > @@ -870,6 +872,8 @@ sdio: mmc@ff510000 { > clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; > fifo-depth = <0x100>; > max-frequency = <150000000>; > + resets = <&cru SRST_SDIO>; > + reset-names = "reset"; > status = "disabled"; > }; > > @@ -882,6 +886,8 @@ emmc: mmc@ff520000 { > clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; > fifo-depth = <0x100>; > max-frequency = <150000000>; > + resets = <&cru SRST_EMMC>; > + reset-names = "reset"; > status = "disabled"; > }; > > @@ -980,6 +986,20 @@ usb_host0_ohci: usb@ff5d0000 { > status = "disabled"; > }; > > + sdmmc_ext: dwmmc@ff5f0000 { /arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: dwmmc@ff5f0000: $nodename:0: 'dwmmc@ff5f0000' does not match '^mmc(@.*)?$' > + compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; > + reg = <0x0 0xff5f0000 0x0 0x4000>; > + interrupts = ; > + clocks = <&cru HCLK_SDMMC_EXT>, <&cru SCLK_SDMMC_EXT>, > + <&cru SCLK_SDMMC_EXT_DRV>, <&cru SCLK_SDMMC_EXT_SAMPLE>; > + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; > + fifo-depth = <0x100>; > + max-frequency = <150000000>; > + resets = <&cru SRST_SDMMCEXT>; > + reset-names = "reset"; > + status = "disabled"; > + }; > + > usbdrd3: usb@ff600000 { > compatible = "rockchip,rk3328-dwc3", "snps,dwc3"; > reg = <0x0 0xff600000 0x0 0x100000>; >