Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Subject: Re: [PATCH] arm64: dts: rockchip: Add sdmmc_ext for RK3328
To:     Johan Jonker <jbx6244@gmail.com>, Heiko Stuebner <heiko@sntech.de>
Cc:     Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
References: <20210623120001.164920-1-knaerzche@gmail.com>
 <c30377a1-90aa-d79e-a60a-5bc1a8e18c44@gmail.com>
From:   Alex Bee <knaerzche@gmail.com>
Message-ID: <b534795a-fc1d-3e89-7ea9-0606297cd9b1@gmail.com>
Date:   Wed, 23 Jun 2021 15:53:18 +0200
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101
 Thunderbird/78.8.1
MIME-Version: 1.0
In-Reply-To: <c30377a1-90aa-d79e-a60a-5bc1a8e18c44@gmail.com>
Content-Type: text/plain; charset=utf-8; format=flowed
Content-Transfer-Encoding: 7bit
Content-Language: en-US
Precedence: bulk

Hi Johan,

Am 23.06.21 um 14:53 schrieb Johan Jonker:
> Hi Alex,
>
> make ARCH=arm64 dtbs_check
> DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml
>
> On 6/23/21 2:00 PM, Alex Bee wrote:
>> RK3328 SoC has a fourth mmc controller called SDMMC_EXT. Some
>> boards have sdio wifi connected to it. In order to use it
>> one would have to add the pinctrls from sdmmc0ext group which
>> is done on board level.
>>
>> While at that also add the reset controls for the other mmc
>> controllers.
>>
>> Signed-off-by: Alex Bee <knaerzche@gmail.com>
>> ---
>>   arch/arm64/boot/dts/rockchip/rk3328.dtsi | 20 ++++++++++++++++++++
>>   1 file changed, 20 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
>> index da84be6f4715..c13fa2f3f4cd 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
>> @@ -858,6 +858,8 @@ sdmmc: mmc@ff500000 {
>>   		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
>>   		fifo-depth = <0x100>;
>>   		max-frequency = <150000000>;
>> +		resets = <&cru SRST_MMC0>;
>> +		reset-names = "reset";
>>   		status = "disabled";
>>   	};
>>   
>> @@ -870,6 +872,8 @@ sdio: mmc@ff510000 {
>>   		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
>>   		fifo-depth = <0x100>;
>>   		max-frequency = <150000000>;
>> +		resets = <&cru SRST_SDIO>;
>> +		reset-names = "reset";
>>   		status = "disabled";
>>   	};
>>   
>> @@ -882,6 +886,8 @@ emmc: mmc@ff520000 {
>>   		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
>>   		fifo-depth = <0x100>;
>>   		max-frequency = <150000000>;
>> +		resets = <&cru SRST_EMMC>;
>> +		reset-names = "reset";
>>   		status = "disabled";
>>   	};
>>   
>> @@ -980,6 +986,20 @@ usb_host0_ohci: usb@ff5d0000 {
>>   		status = "disabled";
>>   	};
>>   
>> +	sdmmc_ext: dwmmc@ff5f0000 {
> /arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: dwmmc@ff5f0000:
> $nodename:0: 'dwmmc@ff5f0000' does not match '^mmc(@.*)?$'

Argh: I submitted the pre-dtbs_check version. Thanks for checking.

Alex.

>> +		compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
>> +		reg = <0x0 0xff5f0000 0x0 0x4000>;
>> +		interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
>> +		clocks = <&cru HCLK_SDMMC_EXT>, <&cru SCLK_SDMMC_EXT>,
>> +			 <&cru SCLK_SDMMC_EXT_DRV>, <&cru SCLK_SDMMC_EXT_SAMPLE>;
>> +		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
>> +		fifo-depth = <0x100>;
>> +		max-frequency = <150000000>;
>> +		resets = <&cru SRST_SDMMCEXT>;
>> +		reset-names = "reset";
>> +		status = "disabled";
>> +	};
>> +
>>   	usbdrd3: usb@ff600000 {
>>   		compatible = "rockchip,rk3328-dwc3", "snps,dwc3";
>>   		reg = <0x0 0xff600000 0x0 0x100000>;
>>