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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id q18sm25708pgj.8.2021.06.23.13.48.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Jun 2021 13:48:03 -0700 (PDT) Date: Wed, 23 Jun 2021 20:47:59 +0000 From: Sean Christopherson To: Paolo Bonzini Cc: Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Yu Zhang , Maxim Levitsky Subject: Re: [PATCH 25/54] KVM: x86/mmu: Add helpers to query mmu_role bits Message-ID: References: <20210622175739.3610207-1-seanjc@google.com> <20210622175739.3610207-26-seanjc@google.com> <1babfd1c-bee1-12e5-a9d9-9507891efdfd@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1babfd1c-bee1-12e5-a9d9-9507891efdfd@redhat.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jun 23, 2021, Paolo Bonzini wrote: > On 22/06/21 19:57, Sean Christopherson wrote: > > +static inline bool is_##reg##_##name(struct kvm_mmu *mmu) \ > > What do you think about calling these is_mmu_##name? The point of having > these helpers is that the register doesn't count, and they return the > effective value (e.g. false in most EPT cases). I strongly prefer to keep in the name, both to match the mmu_role bits and to make it a bit more clear that it's reflective (modified) register state, as opposed to PTEs or even something else entirely. E.g. I always struggled to remember the purpose of mmu->nx flag. I wouldn't be opposed to is_mmu_##reg##_##name() though. I omitted the "mmu" part because it was loosely implied by the "struct kvm_mmu" param, and to keep line lengths short. But being explicit is usually a good thing, and looking at the code I don't see any lines that would wrap if "mmu" were added. > > +{ \ > > + return !!(mmu->mmu_role. base_or_ext . reg##_##name); \ > > +} > > +BUILD_MMU_ROLE_ACCESSOR(ext, cr0, pg); > > +BUILD_MMU_ROLE_ACCESSOR(base, cr0, wp); > > +BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pse); > > +BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pae); > > +BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smep); > > +BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smap); > > +BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pke); > > +BUILD_MMU_ROLE_ACCESSOR(ext, cr4, la57); > > +BUILD_MMU_ROLE_ACCESSOR(base, efer, nx); > > + > > struct kvm_mmu_role_regs vcpu_to_role_regs(struct kvm_vcpu *vcpu) >