Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp153021pxj; Wed, 23 Jun 2021 18:23:45 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwLkkwQvgjtEr2LV1//XEV0PjgZwl2yZm2pMy9QO9MNlA7+8hYv+SxwFI8rLY65U7tJ34H7 X-Received: by 2002:a05:6402:5109:: with SMTP id m9mr3585451edd.68.1624497825036; Wed, 23 Jun 2021 18:23:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624497825; cv=none; d=google.com; s=arc-20160816; b=xhz5fdme4DXutwR/PZJo/nKkBB3khXrbwkak/eUE0AgilqPI/DvkD6KLZHW8A7+sLV 3LI6X8ApCcPcEglv2cgU1SKfk/KsESRjgKfyzUGVn8D3oqrKLwKaN2t1I0JXiDX21iAX nZhC2BLOajC/O8iWNjuhovCcaSIX31Ned3+Q8y237XeUZZPwolIXRGM3QlpYLeA7z/pK Anlb5CMDGGuvYVs4Dejv28CCEr1vedVIqVzEbqeDQ0Fn5oaOgfR7XMZRSvJVFjOOTLVp //VEXAW7F0VY6/QmA7tbUI+hNZ5a5yXkLHqWDwwRYEyUFqqe4HiamEIV5OPoikvw/0Ep 2DMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:user-agent:in-reply-to:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :ironport-sdr:ironport-sdr; bh=kF7bRgGBANB5zmSOVNaaDRyyMyYvjF7nKp+9xpkrX0Y=; b=yvxDmvzLrtsNRjjHiym/qUE/kwfwQswXRQGPjNxlors8Ip74Y/E6ZYcpv+CPtdFyDp teJXHtiZMpRydVWgG1owNYJdM3CxYfBsUc2dsVfVPj9HbZi6NFJYm/gz5F9UKBLLSfqF s9CRLiWRVD3yjJ29ocOpeJ4j21XIXq5LmuT0QxpNQuD91i6yw8Bb7aIsEWhJ1TZEHL3r eRoJbh9xPF+/6w3AC6xQZu4sePUOgTdPw/GZhzTcZ01YwXJEpdQVc7kuM0/h090QZlkW 6+aRajb/2QPezM/0objBSib4IQGRRhv7pwSj2dpFaYkGd40i5N7rbEzvN3Mog1QuWkFK 70yA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id aq5si1276833ejc.613.2021.06.23.18.23.04; Wed, 23 Jun 2021 18:23:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229900AbhFXBWz (ORCPT + 99 others); Wed, 23 Jun 2021 21:22:55 -0400 Received: from mga18.intel.com ([134.134.136.126]:23743 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229759AbhFXBWy (ORCPT ); Wed, 23 Jun 2021 21:22:54 -0400 IronPort-SDR: Rp3uolIvG4kSR8A0qwJuUEj5I4iwMU5PhV9nXrYVpyGOlD0iHuq4MLquymIJr+1mbt1r5YIP6p YdbxoylfX9zg== X-IronPort-AV: E=McAfee;i="6200,9189,10024"; a="194676400" X-IronPort-AV: E=Sophos;i="5.83,295,1616482800"; d="scan'208";a="194676400" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jun 2021 18:20:36 -0700 IronPort-SDR: tac5mdNb3TRW2zCX7aYeaEw/PrSAYMm4FPomcKXiPCsXeARGJjj/ei0UhvRMipfXkfRn6aXZ8J FFhGHxLxycXw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.83,295,1616482800"; d="scan'208";a="557156873" Received: from michael-optiplex-9020.sh.intel.com (HELO localhost) ([10.239.159.182]) by fmsmga001.fm.intel.com with ESMTP; 23 Jun 2021 18:20:32 -0700 Date: Thu, 24 Jun 2021 09:35:10 +0800 From: Yang Weijiang To: Jim Mattson Cc: Like Xu , Paolo Bonzini , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Joerg Roedel , Yang Weijiang , Wei Wang , kvm list , LKML Subject: Re: [RESEND PATCH v4 04/10] KVM: vmx/pmu: Add MSR_ARCH_LBR_CTL emulation for Arch LBR Message-ID: <20210624013510.GB15841@intel.com> References: <20210510081535.94184-1-like.xu@linux.intel.com> <20210510081535.94184-5-like.xu@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jun 23, 2021 at 11:29:08AM -0700, Jim Mattson wrote: > On Mon, May 10, 2021 at 1:16 AM Like Xu wrote: > > > > Arch LBRs are enabled by setting MSR_ARCH_LBR_CTL.LBREn to 1. A new guest > > state field named "Guest IA32_LBR_CTL" is added to enhance guest LBR usage. > > When guest Arch LBR is enabled, a guest LBR event will be created like the > > model-specific LBR does. > > > > On processors that support Arch LBR, MSR_IA32_DEBUGCTLMSR[bit 0] has no > > meaning. It can be written to 0 or 1, but reads will always return 0. > > Like IA32_DEBUGCTL, IA32_ARCH_LBR_CTL msr is also reserved on INIT. > > > > Signed-off-by: Like Xu > > --- > > arch/x86/events/intel/lbr.c | 2 -- > > arch/x86/include/asm/msr-index.h | 1 + > > arch/x86/include/asm/vmx.h | 2 ++ > > arch/x86/kvm/vmx/pmu_intel.c | 31 ++++++++++++++++++++++++++----- > > arch/x86/kvm/vmx/vmx.c | 9 +++++++++ > > 5 files changed, 38 insertions(+), 7 deletions(-) > > > Same comments as on the previous patch. Your guard for ensuring that > the new VMCS fields exist can be spoofed by a malicious userspace, and > the new MSR has to be enumerated by KVM_GET_MSR_INDEX_LIST. OK, will modify the code, thanks!