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Thu, 24 Jun 2021 05:17:31 -0700 Envelope-to: mturquette@baylibre.com, sboyd@kernel.org, lee.jones@linaro.org, kristo@kernel.org, quanyang.wang@windriver.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Received: from [172.19.2.91] (port=51016 helo=xsjjollys50.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1lwOIV-0003F7-EX; Thu, 24 Jun 2021 05:17:31 -0700 From: Rajan Vaja To: , , , , , CC: , , , Rajan Vaja Subject: [PATCH v5 0/4] clk: zynqmp: Add firmware specific clock flags Date: Thu, 24 Jun 2021 05:16:29 -0700 Message-ID: <20210624121633.22179-1-rajan.vaja@xilinx.com> X-Mailer: git-send-email 2.32.0.93.g670b81a MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d5748052-e30b-4968-5138-08d9370a1089 X-MS-TrafficTypeDiagnostic: MN2PR02MB5791: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:1388; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Jun 2021 12:17:41.5371 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d5748052-e30b-4968-5138-08d9370a1089 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch01.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: DM3NAM02FT010.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR02MB5791 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently firmware is maintaining CCF specific flags and provides to CCF as it is. But CCF flag numbers may change and that shouldn't mean that the firmware needs to change. The firmware should have its own 'flag number space' that is distinct from the common clk framework's 'flag number space'. So use firmware specific clock flags in ZynqMP clock driver instead of CCF flags. Changes in v5: - Added base commit - Added patch #4 to handle divider specific read only flag Changes in v4: - Use if condition instead of ternary operator. Changes in v3: - Modify helper function signature to map zynqmp (common)flags with CCF - Add helper function to map zynqmp (mux & divider)flags with CCF flags Changes in v2: - Add helper function to map zynqmp (common)flags with CCF flags. - Mapped zynqmp clock flags with CCF flags from zynqmp_clk_register_*() functions instead of __zynqmp_clock_get_topology() which is changing the flags to struct clk_init_data instead of the struct clock_topology. Rajan Vaja (4): clk: zynqmp: Use firmware specific common clock flags clk: zynqmp: Use firmware specific divider clock flags clk: zynqmp: Use firmware specific mux clock flags clk: zynqmp: Handle divider specific read only flag drivers/clk/zynqmp/clk-gate-zynqmp.c | 4 ++- drivers/clk/zynqmp/clk-mux-zynqmp.c | 27 ++++++++++++++++-- drivers/clk/zynqmp/clk-zynqmp.h | 41 ++++++++++++++++++++++++++++ drivers/clk/zynqmp/clkc.c | 33 +++++++++++++++++++++- drivers/clk/zynqmp/divider.c | 40 ++++++++++++++++++++++++--- drivers/clk/zynqmp/pll.c | 4 ++- 6 files changed, 140 insertions(+), 9 deletions(-) base-commit: 6efb943b8616ec53a5e444193dccf1af9ad627b5 -- 2.32.0.93.g670b81a