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[209.85.222.179]) by smtp.gmail.com with ESMTPSA id d20sm1962604qtw.92.2021.06.24.07.01.16 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 24 Jun 2021 07:01:16 -0700 (PDT) Received: by mail-qk1-f179.google.com with SMTP id e1so2665451qkm.3 for ; Thu, 24 Jun 2021 07:01:16 -0700 (PDT) X-Received: by 2002:a25:bcb:: with SMTP id 194mr5441792ybl.32.1624543265649; Thu, 24 Jun 2021 07:01:05 -0700 (PDT) MIME-Version: 1.0 References: <20210621235248.2521620-1-dianders@chromium.org> <20210621165230.6.Icde6be7601a5939960caf802056c88cd5132eb4e@changeid> In-Reply-To: From: Doug Anderson Date: Thu, 24 Jun 2021 07:00:52 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 6/6] mmc: sdhci-msm: Request non-strict IOMMU mode To: Greg KH Cc: "Rafael J. Wysocki" , "Rafael J. Wysocki" , Will Deacon , Robin Murphy , Joerg Roedel , Bjorn Andersson , Ulf Hansson , Adrian Hunter , Bjorn Helgaas , Rob Clark , linux-arm-msm , linux-pci@vger.kernel.org, quic_c_gdjako@quicinc.com, "list@263.net:IOMMU DRIVERS , Joerg Roedel ," , Sonny Rao , Sai Prakash Ranjan , Linux MMC List , Veerabhadrarao Badiganti , Rajat Jain , Saravana Kannan , Joel Fernandes , Andy Gross , LKML Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Thu, Jun 24, 2021 at 6:43 AM Greg KH wrote: > > On Mon, Jun 21, 2021 at 04:52:48PM -0700, Douglas Anderson wrote: > > IOMMUs can be run in "strict" mode or in "non-strict" mode. The > > quick-summary difference between the two is that in "strict" mode we > > wait until everything is flushed out when we unmap DMA memory. In > > "non-strict" we don't. > > > > Using the IOMMU in "strict" mode is more secure/safer but slower > > because we have to sit and wait for flushes while we're unmapping. To > > explain a bit why "non-strict" mode is unsafe, let's imagine two > > examples. > > > > An example of "non-strict" being insecure when reading from a device: > > a) Linux driver maps memory for DMA. > > b) Linux driver starts DMA on the device. > > c) Device write to RAM subject to bounds checking done by IOMMU. > > d) Device finishes writing to RAM and signals transfer is finished. > > e) Linux driver starts unmapping DMA memory but doesn't flush. > > Why doesn't it "flush"? This is just how the pre-existing "iommu.strict=0" command line parameter works. > > f) Linux driver validates that the data in memory looks sane and that > > accessing it won't cause the driver to, for instance, overflow a > > buffer. > > g) Device takes advantage of knowledge of how the Linux driver works > > and sneaks in a modification to the data after the validation but > > before the IOMMU unmap flush finishes. > > h) Device has now caused the Linux driver to access memory it > > shouldn't. > > So you are now saying we need to not trust hardware? If so, that's a > massive switch for how the kernel needs to work right? This is a pre-existing concept in the kernel and is in fact so prevalent that there are a bunch of inconsistent ways to configure it (though it's being made better [1]) * On ARM64, default is strict and you can configure it with iommu.strict * On AMD, default is non-strict and you can configure it with amd_iommu=fullflush * On Intel, default is non-strict and you can configure it with intel_iommu=strict ...also pre-existing is that the kernel has special cases for "external" PCI devices where it forces them to strict mode even if the default is non-strict (like on Intel and AMD). I was pointed specifically at for an example of why this was important. > And what driver does f) and allows g) to happen? That would be a normal > bug anyway, why not just fix the driver? This one would be possible to workaround in the driver by copying the memory somewhere else, but it violates the DMA model. Specifically step "e)" above is supposed to mean that the driver is now in full control of the memory, so it should be perfectly justified in assuming that nobody else is scribbling on it. > > An example of "non-strict" being insecure when writing to a device: > > a) Linux driver writes data intended for the device to RAM. > > b) Linux driver maps memory for DMA. > > c) Linux driver starts DMA on the device. > > d) Device reads from RAM subject to bounds checking done by IOMMU. > > e) Device finishes reading from RAM and signals transfer is finished. > > f) Linux driver starts unmapping DMA memory but doesn't flush. > > Why does it not flush? > > What do you mean by "flush" "flush" means force / wait for the IOMMU unmap to fully take effect. > > g) Linux driver frees memory and returns it to the pool. > > What pool? The normal Linux memory pool. > > h) Memory is allocated for another purpose. > > Allocated by what? Someone else that wanted memory. > We have memory allocators that write over the data when freed, why not > just use this if you are concerned about this type of issue? > > > i) Device takes advantage of the period of time before IOMMU flush to > > read memory that it shouldn't have had access to. > > What memory would that be? Depends on who got it. This could be hard to predict unless a peripheral was trying to exploit a very specific version of Linux where maybe it was predictable who got the memory next. > And if you really care about these issues, are you not able to take the > "hit" for the flush all the time as that is a hardware thing, not a > software thing. Why not just always take advantage of that, no driver > changes needed? The whole concept of strict vs. non-strict is definitely not new to my series and I'm mostly just trying to configure it properly. > And this isn't going to work, again, because the "pre_probe" isn't going > to be acceptable, sorry. Right. As discussed in the cover letter, I'm going to try to solve this in other ways that doesn't involve pre_probe. [1] https://lore.kernel.org/linux-iommu/1624016058-189713-1-git-send-email-john.garry@huawei.com/T/#m21bc07b9353b3ba85f2a40557645c2bcc13cbb3e -Doug