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Subject: Re: [PATCH v2 2/2] PCI: xilinx-nwl: Enable the clock through CCF
To:     =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= <kw@linux.com>,
        Michal Simek <michal.simek@xilinx.com>
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From:   Michal Simek <michal.simek@xilinx.com>
Message-ID: <166b9626-cc4d-ff28-74bc-3e0f455c67e8@xilinx.com>
Date:   Fri, 25 Jun 2021 12:48:56 +0200
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Hi,

On 6/23/21 4:19 PM, Krzysztof Wilczyński wrote:
> Hi Michal,
> 
> [...]
>>> Does it make sense for this change to be back-ported to stable and
>>> long-term kernels?
>>>
>>> I am asking to make sure we do the right thing here, as I can imagine
>>> that older kernels (primarily because some folks could use, for example,
>>> Ubuntu LTS releases for development) might often be used by people who
>>> work with the Xilinx FPGAs and such.
>>
>> I think that make sense to do so. I haven't had a time to take look at
>> it closely but I think on Xilinx ZynqMP zcu102 board this missing patch
>> is causing hang when standard debian 5.10 is used.
> 
> OK.  This definitely would be a good candidate for back-port then - it
> might help quite a few folks to get their device going without this
> troublesome hang you mentioned.
> 
> There are a few options as per:
>   https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html
> 
> You can send v3 adding the appropriate tag (see above link or the
> comment below) or once this series (or mainly this patch) reaches Linus'
> tree, then send a message to the stable maintainers mailing list to let
> them know what any why to back-port.
> 
> At this point, I believe that adding the "Cc:" tag which includes the
> "stable@vger.kernel.org" might be the best option as it would involve
> the least amount of work to for Sasha et al.
> 
> What do you think?  Which option would you like to go for?

I have sent v3 with above changes.

Thanks,
Michal