Received: by 2002:a05:6a10:f3d0:0:0:0:0 with SMTP id a16csp1140183pxv; Fri, 25 Jun 2021 06:21:12 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyU9ESaBLIvAiIrB44hxgm4Jtm9gA1TfzkzEFUYkyGgxGzcqVQqigsch+iuP2wf7L3O6E6O X-Received: by 2002:a05:6602:1c4:: with SMTP id w4mr8479156iot.44.1624627272478; Fri, 25 Jun 2021 06:21:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624627272; cv=none; d=google.com; s=arc-20160816; b=ry13Pc1ngZioB9NTrrzTgjFlGzJjWvpUOvQWn3fdbCSJF+jae1xPWOUS1UQh/wlC8V LuXeuVO+FBNAlUcfcO5rc0ESe1w9ZciO5TI3lLUfvvQTB+ROtmR3saep6AYPIDFeykwK AJq8rxXiXjATITs5O+vHPqghuezANAgw7LNSeiGK9XUjJcBYMLtQNW0B+vxUp8f02ZEe Nvq5kA68yxVHOTuRoqXTlw+F4LtlF1HAI06X5IHqJwxSDvV+Ijy/DRMWmgclhMpaxGEl FMDv1E0pv1g4yNaBUg2ZIXycpV5ZdpNVSZL4wp9VCg1hJtuqKtgRSDvHSpypTueb3Bvp B2qg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=isssdZNqoBTYgWhQt9DfLXZWyHNNu96WlfZPAKAGxbw=; b=lpNDwSH1y4zxkJ+W4A1KquxB5mm1LXJkPbZEsAhUGz/RM3PDf0sQ1y6hmgCJNkSEfs p0iHdtM+4uQj81QIXfePTHMpiOZLZ2LCgWAakrkKWj1Vq1r1Cd+so8o8/Nd7L7kiVEue zzilxM9RozvNaQoHtttQR75kcAmjlsis5HnGnPKyr/ujURdScgzIMXWbJ+tGmGq48nHO Km1dSviYjK7QHTye6zOdizflCSD5wMtSMo3hRp01BLl1bKOIPAQcAV276aLTz1wQfXmI b2yV3AtNTIKU76Ld1BGksc8enQqSuCWeSjtkxdptsv+lMXHZXGQkYPaBikhPqmPC+y1B U3nw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=8bytes.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id i1si6176340iov.7.2021.06.25.06.21.00; Fri, 25 Jun 2021 06:21:12 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=8bytes.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231567AbhFYNVX (ORCPT + 99 others); Fri, 25 Jun 2021 09:21:23 -0400 Received: from 8bytes.org ([81.169.241.247]:52276 "EHLO theia.8bytes.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230151AbhFYNVW (ORCPT ); Fri, 25 Jun 2021 09:21:22 -0400 Received: by theia.8bytes.org (Postfix, from userid 1000) id A7AA23FC; Fri, 25 Jun 2021 15:18:59 +0200 (CEST) Date: Fri, 25 Jun 2021 15:18:58 +0200 From: Joerg Roedel To: Douglas Anderson Cc: will@kernel.org, robin.murphy@arm.com, bjorn.andersson@linaro.org, ulf.hansson@linaro.org, adrian.hunter@intel.com, bhelgaas@google.com, john.garry@huawei.com, robdclark@chromium.org, quic_c_gdjako@quicinc.com, saravanak@google.com, rajatja@google.com, saiprakash.ranjan@codeaurora.org, vbadigan@codeaurora.org, linux-mmc@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, iommu@lists.linux-foundation.org, sonnyrao@chromium.org, joel@joelfernandes.org, Andrew Morton , Jonathan Corbet , Jordan Crouse , Konrad Dybcio , Krishna Reddy , "Maciej W. Rozycki" , Nicolin Chen , "Paul E. McKenney" , Peter Zijlstra , Randy Dunlap , Thierry Reding , Viresh Kumar , Vlastimil Babka , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 0/3] iommu: Enable non-strict DMA on QCom SD/MMC Message-ID: References: <20210624171759.4125094-1-dianders@chromium.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210624171759.4125094-1-dianders@chromium.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Douglas, On Thu, Jun 24, 2021 at 10:17:56AM -0700, Douglas Anderson wrote: > The goal of this patch series is to get better SD/MMC performance on > Qualcomm eMMC controllers and in generally nudge us forward on the > path of allowing some devices to be in strict mode and others to be in > non-strict mode. So if I understand it right, this patch-set wants a per-device decision about setting dma-mode to strict vs. non-strict. I think we should get to the reason why strict mode is used by default first. Is the default on ARM platforms to use iommu-strict mode by default and if so, why? The x86 IOMMUs use non-strict mode by default (yes, it is a security trade-off). Regards, Joerg