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Fri, 25 Jun 2021 23:48:01 +0000 Received: from dipenp.nvidia.com (172.20.187.6) by mail.nvidia.com (172.20.187.10) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 25 Jun 2021 23:48:01 +0000 From: Dipen Patel To: , , , , , , , , , , , Subject: [RFC 00/11] Intro to Hardware timestamping engine Date: Fri, 25 Jun 2021 16:55:21 -0700 Message-ID: <20210625235532.19575-1-dipenp@nvidia.com> X-Mailer: git-send-email 2.17.1 X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 35b64ad0-19c0-46ef-426d-08d93833abe5 X-MS-TrafficTypeDiagnostic: BYAPR12MB2872: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:10000; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: OeMe4vaUbZa8dUWTni21dyiuTUN9oOE9sam7kqtaYREt3prYUdSsGhyhRl44jPQj8qjBRKLC6C2rfi3lBX1Llhx/Y8+kC0jOb0PSOfbx6bJfYZYwQNItv3707pcKnIWc0K2M/bkF2GJs2C5ZEqUPwD7q+S+Txid6CuCmjhP/JwbuM2iHMSDDvnmFXQ6/iIs81jFoCj9BDLoUnf6g23obyNRnmxdV2ga3krUoeXjRdb02Lu+6CB0JxMr1/hNauEc9TtBosHMW03KJeyk57QSyGBeeSVbbkTuIiFgomZKPqhfa5H7kXpMIu7J9UUsZNIf7sJPt9sGsV9+GyNs6GwqEmxA9qNtXw9pML8QD5zM4/Ig4tvae9i4zL/59jHwX55GYwyPGdh04LCdL4MghZeCZxRxGyeaW/BDFQ/0YRjLU6pWcyiGHm+YkONMSMwbFHSyAIHDsWLnJAztp8bCuy5YiCYd5ONIctyGoN4Y5L0/N+wxK8YzvelY5G+UUEOHvA1iYTGDixjcJ019dVyI8mMNWWUWBk4pgSwAZJ88p7oheH7LTbjKQEtWix3/RFi57i2pb1iOMmLkqTCdpRuFtuc7fB8gfZUVHN1BNeCY0Unm1m34YycggY/E7p0//xsvZqAfNt0Ef3PbIMaQ+mkmExYktGUWNf4L5GRxrSp76qHL+hTAkObM+vJjb1KYcGwwXS/FXHl41yNRVBdltAKmNOC44Gt+cmI1edE09e0HQQ70PUVetf22RfQyX6e+1lupbGa40QNDMwafRsqnE8Soyuh8fGYNWPCF5DJV8Oqrbbs7jRICJO0LgH5m+e/qxEP49UzjBd0T7OGjB2j2u/oxj8S4lrg== X-Forefront-Antispam-Report: CIP:216.228.112.36;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:schybrid05.nvidia.com;CAT:NONE;SFS:(4636009)(376002)(39860400002)(396003)(346002)(136003)(46966006)(36840700001)(478600001)(7416002)(8676002)(8936002)(426003)(7696005)(82310400003)(6666004)(2616005)(966005)(5660300002)(82740400003)(86362001)(83380400001)(26005)(336012)(70586007)(7636003)(356005)(316002)(36756003)(1076003)(47076005)(70206006)(921005)(110136005)(2906002)(36860700001)(186003)(83996005)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Jun 2021 23:48:02.6952 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 35b64ad0-19c0-46ef-426d-08d93833abe5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.36];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT040.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB2872 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch series introduces new subsystem called hardware timestamping engine (HTE). It offers functionality such as timestamping through hardware means in realtime. The HTE subsystem centralizes HTE provider and consumers where providers can register themselves with subsystem and the consumers can request interested entity which could be lines, GPIO, signals or buses. The HTE subsystem provides timestamp in nano seconds, having said that the provider need to convert the timestamp if its not in that unit. There was upstream discussion about the same at https://lore.kernel.org/lkml/4c46726d-fa35-1a95-4295-bca37c8b6fe3@nvidia.com/ To summarize upstream discussion: - It was heavily favoured by Linus and Kent to extend GPIOLIB and supporting GPIO drivers to add HTE functionality and I agreed to experiment with it. This patch series implements and extends GPIOLIB and GPIO tegra driver. - Discussed possibility to add HTE provider as irqchip instead which was argued against as HTE devices are not necessarily event emitting devices. - Discussed other possibility if HTE device can be added as posix clock type like PTP clocks. That was also argues against since HTE devices are not necessarily tightly coupled with hardware clock. Typical HTE provider does following: - Register itself with HTE subsystem - Provide *request, *release, *enable, *disable timestamp callbacks and optional get_clk_src_info callback to HTE subsystem. - Provide optional xlate callback to the subsystem which can translate consumer provided logical ids into actual ids of the entity, where entity here is the provider dependent and could be GPIO, in chip lines or signals, buses etc...This converted id will be used between HTE subsystem and the provider for below bullet point. - Push timestamps to the subsystem. This happens when HTE provider has timestamp data available and willing to push it to HTE subsystem. The HTE subsystem stores it into software buffer for the consumers. - Unregister itself Typical HTE consumer does following: - Request interested entity it wishes to timestamp in realtime to the subsystem. During this call HTE subsystem allocates software buffer to store timestamps data. - The subsystem does necessary communications with the provider to complete the request, which includes translating logical id of the entity to provider dependent physical/actual id and enabling hardware timestamping on requested id. - It can optionally specify callback during registration, this cb will be called when provider pushes timestamps. Once notified through cb, the consumer can call retrieve API to read the data from the software buffer. If cb is not provided, the consumers can elect to call blocking version of retrieve API. - Manage pre allocated software buffer if needed. It includes changing buffer length and watermark/threshold. The subsystem automatically sets watermark or threshold at 1, consumers can later change it to any other value it wishes. The main purpose for having threshold functionality is to notify consumer either through callback if provided or unblock waiting consumer when threshold is reached. - Retrieve timestamp using various means provided by subsystem. - Release entity and its resources. HTE and GPIOLIB: - For the HTE provider which can timestamp GPIO lines. - For the GPIO consumers, either in kernel or userspace, The GPIOLIB and its CDEV framework are extended as frontend to the HTE by introducing new APIs. - Tegra194 AON GPIO controller has HTE support also known as GTE (Generic Timestamping Engine). The tegra gpio driver is modified to accommodate HTE functionality. Dipen Patel (11): Documentation: Add HTE subsystem guide drivers: Add HTE subsystem hte: Add tegra194 HTE kernel provider dt-bindings: Add HTE bindings hte: Add Tegra194 IRQ HTE test driver gpiolib: Add HTE support gpio: tegra186: Add HTE in gpio-tegra186 driver gpiolib: cdev: Add hardware timestamp clock type tools: gpio: Add new hardware clock type hte: Add tegra GPIO HTE test driver MAINTAINERS: Added HTE Subsystem .../bindings/gpio/nvidia,tegra186-gpio.txt | 7 + .../devicetree/bindings/hte/hte-consumer.yaml | 47 + .../devicetree/bindings/hte/hte.yaml | 34 + .../bindings/hte/nvidia,tegra194-hte.yaml | 83 + Documentation/hte/hte.rst | 198 +++ Documentation/hte/index.rst | 21 + Documentation/hte/tegra194-hte.rst | 65 + Documentation/index.rst | 1 + MAINTAINERS | 8 + drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/gpio/gpio-tegra186.c | 78 + drivers/gpio/gpiolib-cdev.c | 65 +- drivers/gpio/gpiolib.c | 92 ++ drivers/gpio/gpiolib.h | 11 + drivers/hte/Kconfig | 49 + drivers/hte/Makefile | 4 + drivers/hte/hte-tegra194-gpio-test.c | 255 +++ drivers/hte/hte-tegra194-irq-test.c | 400 +++++ drivers/hte/hte-tegra194.c | 554 +++++++ drivers/hte/hte.c | 1368 +++++++++++++++++ include/linux/gpio/consumer.h | 21 +- include/linux/gpio/driver.h | 13 + include/linux/hte.h | 278 ++++ include/uapi/linux/gpio.h | 1 + tools/gpio/gpio-event-mon.c | 6 +- 26 files changed, 3657 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/hte/hte-consumer.yaml create mode 100644 Documentation/devicetree/bindings/hte/hte.yaml create mode 100644 Documentation/devicetree/bindings/hte/nvidia,tegra194-hte.yaml create mode 100644 Documentation/hte/hte.rst create mode 100644 Documentation/hte/index.rst create mode 100644 Documentation/hte/tegra194-hte.rst create mode 100644 drivers/hte/Kconfig create mode 100644 drivers/hte/Makefile create mode 100644 drivers/hte/hte-tegra194-gpio-test.c create mode 100644 drivers/hte/hte-tegra194-irq-test.c create mode 100644 drivers/hte/hte-tegra194.c create mode 100644 drivers/hte/hte.c create mode 100644 include/linux/hte.h -- 2.17.1