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From:   <Dan.Sneddon@microchip.com>
To:     <broonie@kernel.org>, <Dan.Sneddon@microchip.com>
CC:     <linux-spi@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>, <Tudor.Ambarus@microchip.com>,
        <Nicolas.Ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
        <Ludovic.Desroches@microchip.com>
Subject: Re: Re: [PATCH] spi: atmel: Fix CS and initialization bug
Thread-Topic: Re: [PATCH] spi: atmel: Fix CS and initialization bug
Thread-Index: AQHXbQPwgV1WliYrJ0mjjxrwZijXiasrMuKAgAAEBACAAAGcgIAADAcA
Date:   Tue, 29 Jun 2021 17:50:45 +0000
Message-ID: <cb709000-7816-3817-b734-e03735788723@microchip.com>
References: <20210629162914.23286-1-dan.sneddon@microchip.com>
 <20210629164733.GE4613@sirena.org.uk>
 <c849eb7a-d019-b88e-583a-78e1eba7624c@microchip.com>
 <20210629170741.GF4613@sirena.org.uk>
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On 6/29/21 10:07 AM, Mark Brown wrote:
> On Tue, Jun 29, 2021 at 05:01:57PM +0000, Dan.Sneddon@microchip.com wrote=
:
>> On 6/29/21 9:47 AM, Mark Brown wrote:
>=20
>>   >In what way does it do that?  I can't tell what the patch is supposed=
 >to
>>   >do.
>=20
>> The SPI_MASTER_GPIO_SS flag has to be set so that the set_cs function
>> gets called even when using gpio cs pins.
>=20
> This all needs to be clear in the changelog.

I'll update the commit message.

>=20
>>   >> -	enable =3D3D (!!(spi->mode & SPI_CS_HIGH) =3D3D=3D3D enable);
>>   >> =3D20
>>   >> -	if (enable) {
>>   >> +	if ((enable && (spi->mode & SPI_CS_HIGH))
>>   >> +			|| (!enable && !(spi->mode & SPI_CS_HIGH))) {
>=20
>>   >This looks especially suspicious.
>=20
>> It's due to the fact that the spi core tells set_cs if the cs should be
>> high or low, not active or disabled.  This logic is to convert from
>> high/low to active/disabled.
>=20
> spi_set_cs() handles SPI_CS_HIGH...  this looks like a separate existing
> driver bug, it should just be ignoring SPI_CS_HIGH if it's providing a
> set_cs() operation and letting the core implement SPI_CS_HIGH for it.  I
> only checked breifly but it looks like spi-atmel is trying to use the
> core support for chipselect handling here.
>=20