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[209.85.218.52]) by smtp.gmail.com with ESMTPSA id f3sm8970092ejl.29.2021.06.29.15.04.42 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 29 Jun 2021 15:04:42 -0700 (PDT) Received: by mail-ej1-f52.google.com with SMTP id hc16so450750ejc.12 for ; Tue, 29 Jun 2021 15:04:42 -0700 (PDT) X-Received: by 2002:a05:651c:32e:: with SMTP id b14mr5398881ljp.251.1625003885865; Tue, 29 Jun 2021 14:58:05 -0700 (PDT) MIME-Version: 1.0 References: <202106281231.E99B92BB13@keescook> <202106291311.20AB10D04@keescook> In-Reply-To: From: Linus Torvalds Date: Tue, 29 Jun 2021 14:57:49 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [GIT PULL] Clang feature updates for v5.14-rc1 To: Nick Desaulniers Cc: Kees Cook , Linux Kernel Mailing List , Bill Wendling , Bill Wendling , Catalin Marinas , clang-built-linux , Fangrui Song , Heiko Carstens , Jarmo Tiitto , Lukas Bulwahn , Mark Rutland , Masahiro Yamada , Miguel Ojeda , Nathan Chancellor , Peter Oberparleiter , Peter Zijlstra , Sami Tolvanen , Will Deacon Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jun 29, 2021 at 2:27 PM Nick Desaulniers wrote: > > Right now we're having trouble with hardware performance counters on > non-intel chips; I don't think we have working LBR equivalents on AMD > until zen3, and our ETM based samples on ARM are hung up on a few last > minute issues requiring new hardware (from multiple different chipset > vendors). I agree that perf profiling works best on Intel. The AMD perf side works ok in Zen 2 from what I've seen, but needs to be a full-system profile ("perf record -a") to use the better options, and ARM is.. But with x86 ranging from "excellent" to "usable", and ARM hopefully being at least close to getting better proper profile data, I really think it's the way forward, with instrumentation being a band-aid at best. Linus