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[23.128.96.18]) by mx.google.com with ESMTP id dp16si24398208ejc.454.2021.06.30.01.48.53; Wed, 30 Jun 2021 01:49:17 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=tV118Dik; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233747AbhF3IuS (ORCPT + 99 others); Wed, 30 Jun 2021 04:50:18 -0400 Received: from mx07-00178001.pphosted.com ([185.132.182.106]:48235 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233516AbhF3IuQ (ORCPT ); Wed, 30 Jun 2021 04:50:16 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 15U8kps5001022; Wed, 30 Jun 2021 10:47:35 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=selector1; bh=wvHutvszO60NpsmtRJ9LbKZBrctdcsmxFVI5e4fzTWs=; b=tV118DikJuN7rlkwVDqV5Q4wNlP7tyQmJZziribC3i+cCUboPy9xufXFj3xXjpWiwn+h +89MD2iHGlosXkIbwotSKSfkGDv/vfAkQH3p+YJQHQiHJWsO/QARUj/hYJ18avRXXXYQ uVeGN+g/G5HDqwjsumUMOiqHVtQFHUmLTXYPQD7vpcOBVSkBkUdSZsVNII7C322YlEVG IovQ+tUMi8cimx/u/kW5Fg2WYsmnF0/LqdbxYHhfZbJy2fmX+H9wiXYY9/w/jl+tM/WW FN30uI8ZCewRHyK7OGyio1BBW2m7XZpc8I0OX3ekTkmq98kKURdLdj6npS0am06bckIT 2w== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 39gn1186a6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 30 Jun 2021 10:47:35 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id DDEC1100038; Wed, 30 Jun 2021 10:47:34 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag2node3.st.com [10.75.127.6]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id D0BF021BF5F; Wed, 30 Jun 2021 10:47:34 +0200 (CEST) Received: from localhost (10.75.127.44) by SFHDAG2NODE3.st.com (10.75.127.6) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 30 Jun 2021 10:47:34 +0200 From: Alain Volmat To: , CC: , , , , , , , Subject: [PATCH 2/6] spi: stm32h7: fix full duplex irq handler handling Date: Wed, 30 Jun 2021 10:45:19 +0200 Message-ID: <1625042723-661-3-git-send-email-alain.volmat@foss.st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1625042723-661-1-git-send-email-alain.volmat@foss.st.com> References: <1625042723-661-1-git-send-email-alain.volmat@foss.st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SFHDAG2NODE3.st.com (10.75.127.6) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391,18.0.790 definitions=2021-06-30_02:2021-06-29,2021-06-30 signatures=0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In case of Full-Duplex mode, DXP flag is set when RXP and TXP flags are set. But to avoid 2 different handlings, just add TXP and RXP flag in the mask instead of DXP, and then keep the initial handling of TXP and RXP events. Also rephrase comment about EOTIE which is one of the interrupt enable bits. It is not triggered by any event. Signed-off-by: Amelie Delaunay Signed-off-by: Alain Volmat --- drivers/spi/spi-stm32.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c index fe35c5cfb820..4dbd5cbe0c11 100644 --- a/drivers/spi/spi-stm32.c +++ b/drivers/spi/spi-stm32.c @@ -886,15 +886,18 @@ static irqreturn_t stm32h7_spi_irq_thread(int irq, void *dev_id) ier = readl_relaxed(spi->base + STM32H7_SPI_IER); mask = ier; - /* EOTIE is triggered on EOT, SUSP and TXC events. */ + /* + * EOTIE enables irq from EOT, SUSP and TXC events. We need to set + * SUSP to acknowledge it later. TXC is automatically cleared + */ + mask |= STM32H7_SPI_SR_SUSP; /* - * When TXTF is set, DXPIE and TXPIE are cleared. So in case of - * Full-Duplex, need to poll RXP event to know if there are remaining - * data, before disabling SPI. + * DXPIE is set in Full-Duplex, one IT will be raised if TXP and RXP + * are set. So in case of Full-Duplex, need to poll TXP and RXP event. */ - if (spi->rx_buf && !spi->cur_usedma) - mask |= STM32H7_SPI_SR_RXP; + if ((spi->cur_comm == SPI_FULL_DUPLEX) && !spi->cur_usedma) + mask |= STM32H7_SPI_SR_TXP | STM32H7_SPI_SR_RXP; if (!(sr & mask)) { dev_warn(spi->dev, "spurious IT (sr=0x%08x, ier=0x%08x)\n", -- 2.25.1