Received: by 2002:a05:6a10:f3d0:0:0:0:0 with SMTP id a16csp164935pxv; Wed, 30 Jun 2021 02:40:06 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxf4QE5tJq9CcpZTczbdtgKONRg2kLzqDXM4jQxLOvoGFakN1G+dKNfaDLKHb+6yM6KuL5h X-Received: by 2002:a05:6602:280b:: with SMTP id d11mr7257149ioe.188.1625046006802; Wed, 30 Jun 2021 02:40:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1625046006; cv=none; d=google.com; s=arc-20160816; b=y/RYtoei/G5AR81YnJIEtzzXgm1RlcEQNksEpiuOurRsmtZX8N/TDEULPFpm1bpejW FWkrQiglin4XdITNtiDqrdQYXgUl9wbMFScUWbsGt205fK6sjoSFl78Qx9WNScgOoNu3 dSg/ExtOrgN7EbwxRgoI7uNsZcOLxtqMQakfX8Q8AIkZS3O3quZmpBUNZ4Z4ga6OrIrJ HASEtKhnbfbZhw7DX14hZNDgectXQoBUygpMZUvIVsKtFCjk6a1bScDUCncvS6SUaFIe dhVEtYN8BH6e0drn9BuH8YQ/5ShUvYOrXbepcVB7CPLvgn4hX+d64f6akp2d2TOlyrLr 0dwg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:to:from; bh=4hqgX7SZCTdV6f0QhfHYs+LkDXqaEiemu/3AcQDxNgM=; b=adywMYwldgfoFJUP7Yqf0i8FsBCwWF05KatpRHFT1cgMl388xMawupMpyeCJcYMYmY dMgyJ/yuVu85bBAeScnvN2cEGzTiXxXRQuzbyjtL0oWZk6zdT2yv3U5/nBPVZvHApdKM wWx1d9EJRBoXNECYCpjHE5aRoSZ1fy5t4wZt0uLp2uIM8LvidSEYiPUZAiz5S0hyP+Mw KJcmLQO64wwZKwJwPbIJ6LmBdIps1XrwQpQoeJgsX8V/SVbGaCYK208nPbIRM/CD37i+ yyv4iXEa7nB2sLkPE/mB1pW/xkYZ27Vu24gyGFRdYFnrJNibVYlmoDPmLW6Ido7IevDK XK4Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=canonical.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id r14si24720564ila.121.2021.06.30.02.39.55; Wed, 30 Jun 2021 02:40:06 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=canonical.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233959AbhF3JkZ (ORCPT + 99 others); Wed, 30 Jun 2021 05:40:25 -0400 Received: from youngberry.canonical.com ([91.189.89.112]:59637 "EHLO youngberry.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233817AbhF3JkY (ORCPT ); Wed, 30 Jun 2021 05:40:24 -0400 Received: from [222.129.34.206] (helo=localhost.localdomain) by youngberry.canonical.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.93) (envelope-from ) id 1lyWfK-0001gm-5f; Wed, 30 Jun 2021 09:37:54 +0000 From: Aaron Ma To: aaron.ma@canonical.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, gregkh@linuxfoundation.org Subject: [RESEND][PATCH] drm/i915: Force DPCD backlight mode for Samsung 16727 panel Date: Wed, 30 Jun 2021 17:37:21 +0800 Message-Id: <20210630093721.10887-1-aaron.ma@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Another Samsung OLED panel needs DPCD to get control of backlight. Kernel 5.12+ support the backlight via: commit: <4a8d79901d5b> ("drm/i915/dp: Enable Intel's HDR backlight interface (only SDR for now)") Only make backlight work on lower versions of kernel. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3474 Cc: stable@vger.kernel.org # 5.11- Signed-off-by: Aaron Ma --- drivers/gpu/drm/drm_dp_helper.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 5bd0934004e3..7b91d8a76cd6 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -1960,6 +1960,7 @@ static const struct edid_quirk edid_quirk_list[] = { { MFG(0x4d, 0x10), PROD_ID(0xe6, 0x14), BIT(DP_QUIRK_FORCE_DPCD_BACKLIGHT) }, { MFG(0x4c, 0x83), PROD_ID(0x47, 0x41), BIT(DP_QUIRK_FORCE_DPCD_BACKLIGHT) }, { MFG(0x09, 0xe5), PROD_ID(0xde, 0x08), BIT(DP_QUIRK_FORCE_DPCD_BACKLIGHT) }, + { MFG(0x4c, 0x83), PROD_ID(0x57, 0x41), BIT(DP_QUIRK_FORCE_DPCD_BACKLIGHT) }, }; #undef MFG -- 2.32.0