Received: by 2002:a05:6a10:f3d0:0:0:0:0 with SMTP id a16csp385684pxv; Wed, 30 Jun 2021 07:49:19 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyZlb2NlTdf2Fl8gbGoAqaQHEul7ou/nMJHJ5Wiqifz5C075/6YWtHgL90xjAV72TlSr/Xw X-Received: by 2002:aa7:cdc8:: with SMTP id h8mr46270464edw.323.1625064559634; Wed, 30 Jun 2021 07:49:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1625064559; cv=none; d=google.com; s=arc-20160816; b=Ga//vhpnBReqMrM7MytZlDd/NIPloUh470wccKRR3BwwCHEF3MUhPacSAilR6k1Z+8 Mk1IjEjb8XE8verhJLJiGw1b4J8plzicd2yRPT7UnMYxFBiSZGewCmCNaP2zLRfa6A0o glnYVMi4h9t9sjd4cgTyGd3ooLpB3huV0Bb3cbLVZGg9Wuja58kIZjzJ8Zqe7Lt9Cle4 534K0wb9zk5j3W4edIJ8Ep58LvWEEZIlaWuwPW5Fn6XwqPEYSBAkMz6a/NEEPCBHvKw8 zdL9uUncCFXYBjeoxnm436Y5/JXDzTww3FH9NtzWKqf7gIQddAk5Pj2zWSPPY2bLw53+ F17A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=+h98zfDriuV87xNfaIYLM8FKCYE4wPWrh/1a/t+VINQ=; b=yLZU5t0tTCZBUVgK0GoN2FJbIcSRimwaewPEfV3rL6AGDzE2rRcyNN84BDIPmIeRQT rhgHOlyuWkXtkyUu5qQe0cT20569FHzwnf+mE0GNoETwD1OzxtIMccAyjfpwZBKvMUd2 EMwE2Lz+kM4J3gQ76EwnwuouZzjtCnHaqq6eQMphfz2vZmI2vqqm74EsE9b64H7FhQsd o4kFCgdmHR+I/D0qCEVc2gL1EWukCgDCjEq4GmTXcXzWPfrtZ/mbEBOjwYNiC+s3PXGn Py768vsZCorEPkPsFE2Vh34XS5dtO6XqEy0JF3VB+2SwHg3Xy5Re/EgUvdfF7m9yUvVk OZaw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id e12si20266578edz.497.2021.06.30.07.48.55; Wed, 30 Jun 2021 07:49:19 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235716AbhF3Otm (ORCPT + 99 others); Wed, 30 Jun 2021 10:49:42 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:48168 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235504AbhF3Ot0 (ORCPT ); Wed, 30 Jun 2021 10:49:26 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 32FBB1F435F2 From: Enric Balletbo i Serra To: linux-kernel@vger.kernel.org Cc: jitao.shi@mediatek.com, chunkuang.hu@kernel.org, matthias.bgg@gmail.com, drinkcat@chromium.org, eizan@chromium.org, kernel@collabora.com, linux-mediatek@lists.infradead.org, hsinyi@chromium.org, Fabien Parent , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/6] dt-bindings: mediatek: Add #reset-cells to mmsys system controller Date: Wed, 30 Jun 2021 16:46:42 +0200 Message-Id: <20210630164623.2.I3f7f1c9a8e46be07d1757ddf4e0097535f3a7d41@changeid> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210630144646.868702-1-enric.balletbo@collabora.com> References: <20210630144646.868702-1-enric.balletbo@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The mmsys system controller exposes a set of memory client resets and needs to specify the #reset-cells property in order to advertise the number of cells needed to describe each of the resets. Signed-off-by: Enric Balletbo i Serra --- .../devicetree/bindings/arm/mediatek/mediatek,mmsys.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt index 78c50733985c..ce958446558e 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt @@ -17,6 +17,7 @@ Required Properties: - "mediatek,mt8173-mmsys", "syscon" - "mediatek,mt8183-mmsys", "syscon" - #clock-cells: Must be 1 +- #reset-cells: Must be 1 For the clock control, the mmsys controller uses the common clk binding from Documentation/devicetree/bindings/clock/clock-bindings.txt @@ -28,4 +29,5 @@ mmsys: syscon@14000000 { compatible = "mediatek,mt8173-mmsys", "syscon"; reg = <0 0x14000000 0 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; }; -- 2.30.2