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[23.128.96.18]) by mx.google.com with ESMTP id e17si5671153ejy.290.2021.06.30.08.24.11; Wed, 30 Jun 2021 08:24:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235565AbhF3PXc (ORCPT + 99 others); Wed, 30 Jun 2021 11:23:32 -0400 Received: from mail-ed1-f41.google.com ([209.85.208.41]:35416 "EHLO mail-ed1-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235417AbhF3PX2 (ORCPT ); Wed, 30 Jun 2021 11:23:28 -0400 Received: by mail-ed1-f41.google.com with SMTP id df12so3826129edb.2; Wed, 30 Jun 2021 08:20:59 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Sz1XXHWZ7zn1WpHe2P7mcJtnwjKt4l13a3EOZTMRPAo=; b=YlJwaIFd1dvboak11sCCPkFvUblbcUhH4kkHmQYGjUVWfk65TxvrBEt3cCGh+IVcVl 8ODa4KqRakqWmt3uZE3F49SGGVCbErtfiTt+g84X5UXmgxbZ037nVlsu+ExO/aWoBk52 111Zhb8jlW8C3Weq5wYA3RoodWLhah9WuX3gGk6j/L6BoGNLxduOIyGLBlQ4ICAoo9w4 LDjCobAYkNWcaPBgQz3uoH3gW9/fQcfjnKZrUq5EQyjbn/NFPKAfHYRS784TAzn+7WZu bb9EOxCB/Rajo3LNixyGPyqQqPrhPCQhtSphEQPCTO7u4s6JG5aZcWCTDL6lHeJO2a4Q hlbg== X-Gm-Message-State: AOAM5311U9VaUcf3hPA0gBg5cenadp1b2siKA3GG6NWZtDXnjTBx0ijw 264XFwIr9QdAgMp6Jq+CtYvkGv+ro8YBgbUxzmnBDMe2O/A= X-Received: by 2002:a05:6402:31b4:: with SMTP id dj20mr48326007edb.186.1625066458480; Wed, 30 Jun 2021 08:20:58 -0700 (PDT) MIME-Version: 1.0 References: <874kf11yoz.ffs@nanos.tec.linutronix.de> <87k0ntazyn.ffs@nanos.tec.linutronix.de> <37833625-3e6b-5d93-cc4d-26164d06a0c6@intel.com> <9c8138eb-3956-e897-ed4e-426bf6663c11@intel.com> <87pmxk87th.fsf@oldenburg.str.redhat.com> <87wnqkzklg.fsf@oldenburg.str.redhat.com> <93e3b500-5992-a674-18e6-445d1db7b1f0@metux.net> <87tulirw5y.fsf@oldenburg.str.redhat.com> <84be3cfd-e825-ae75-bbae-2bbd3360daa7@metux.net> <0978e79c-33ad-c05b-3897-99334c381396@linux.intel.com> In-Reply-To: <0978e79c-33ad-c05b-3897-99334c381396@linux.intel.com> From: Len Brown Date: Wed, 30 Jun 2021 11:20:47 -0400 Message-ID: Subject: Re: Candidate Linux ABI for Intel AMX and hypothetical new related features To: Arjan van de Ven Cc: "Enrico Weigelt, metux IT consult" , Florian Weimer , Peter Zijlstra , Dave Hansen via Libc-alpha , Dave Hansen , Rich Felker , Linux API , "Bae, Chang Seok" , X86 ML , LKML , Kyle Huey , Borislav Petkov , Andy Lutomirski , Thomas Gleixner , Keno Fischer , Willy Tarreau Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The latest proposal for kernel AMX support (updated today) is here: https://lore.kernel.org/lkml/20210630060226.24652-1-chang.seok.bae@intel.com/ The main challenge for AMX is not context switch performance. Hardware recognizes INIT state (the common case) and skips that data transfer when it is not needed. The main challenge for AMX is compatibility. Specifically, user signal stack growth. The legacy ABI is that we put an uncompacted XSTATE image on the signal stack. In the default stack case, this isn't a problem, but when a user allocates an alternative signal stack, the 8K of XSTATE growth that AMX can exceed what the user allocated. The new system call tells the kernel that the application can handle it. (it can do this by not using altsigstack, or by using the updated stack size advertised by glibc 2.34 and later, or some other means)