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Subject: Re: [PATCH v3 2/2] bus: mhi: Fix MHI DMA structure endianness
From:   Hemant Kumar <hemantk@codeaurora.org>
To:     Paul Davey <paul.davey@alliedtelesis.co.nz>,
        Manivannan Sadhasivam <mani@kernel.org>
Cc:     Bhaumik Bhatt <bbhatt@codeaurora.org>,
        linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org
Date:   Wed, 30 Jun 2021 18:52:51 -0700
In-Reply-To: <20210629035357.11091-3-paul.davey@alliedtelesis.co.nz>
References: <20210629035357.11091-1-paul.davey@alliedtelesis.co.nz>
         <20210629035357.11091-3-paul.davey@alliedtelesis.co.nz>
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Hi Paul,
On Tue, 2021-06-29 at 15:53 +1200, Paul Davey wrote:
> The MHI driver does not work on big endian architectures.  The
> controller never transitions into mission mode.  This appears to be
> due
> to the modem device expecting the various contexts and transfer rings
> to
> have fields in little endian order in memory, but the driver
> constructs
> them in native endianness.
> 
> Fix MHI event, channel and command contexts and TRE handling macros
> to
> use explicit conversion to little endian.  Mark fields in relevant
> structures as little endian to document this requirement.
> 
> Signed-off-by: Paul Davey <paul.davey@alliedtelesis.co.nz>
> ---
> Removed Tested-by as patch has changed somewhat from v2.
Bhaumik is going to help testing V2 on x86 platform. Change looks good
to me. Will ack it once testing is done.
> [..]
> 

Thanks,
Hemant
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