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Date:   Wed, 30 Jun 2021 19:38:28 -0700 (PDT)
Subject:     Re: [PATCH -next v2] riscv: Enable KFENCE for riscv64
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CC:     liushixin2@huawei.com, Paul Walmsley <paul.walmsley@sifive.com>,
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From:   Palmer Dabbelt <palmerdabbelt@google.com>
To:     elver@google.com
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On Wed, 16 Jun 2021 02:11:53 PDT (-0700), elver@google.com wrote:
> On Tue, 15 Jun 2021 at 04:35, Liu Shixin <liushixin2@huawei.com> wrote:
>> Add architecture specific implementation details for KFENCE and enable
>> KFENCE for the riscv64 architecture. In particular, this implements the
>> required interface in <asm/kfence.h>.
>>
>> KFENCE requires that attributes for pages from its memory pool can
>> individually be set. Therefore, force the kfence pool to be mapped at
>> page granularity.
>>
>> Testing this patch using the testcases in kfence_test.c and all passed.
>>
>> Signed-off-by: Liu Shixin <liushixin2@huawei.com>
>> Acked-by: Marco Elver <elver@google.com>
>> Reviewed-by: Kefeng Wang <wangkefeng.wang@huawei.com>
>
> I can't see this in -next yet. It would be nice if riscv64 could get
> KFENCE support.

Thanks, this is on for-next.  I'm just doing a boot test with 
CONFIG_KFENCE=y (and whatever that turns on for defconfig), let me know 
if there's anything more interesting to test on the KFENCE side of 
things.