Received: by 2002:a05:6a10:f3d0:0:0:0:0 with SMTP id a16csp1887094pxv; Fri, 2 Jul 2021 15:11:27 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyS1oOWzq0WmQZa6z6jrIxuGoM0/fv4GVGujf3rSygdGKCdeLvVGuUjrM+eMUjYMZ3LnTgE X-Received: by 2002:a17:906:718b:: with SMTP id h11mr1941508ejk.418.1625263887661; Fri, 02 Jul 2021 15:11:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1625263887; cv=none; d=google.com; s=arc-20160816; b=wfT9gtyeNvdzMiZrRTdSvlTGMdR0dwPhet0qai0chIRxUC2EbRkQoM5NoMY/hjkJmJ YegwCtNKu2N5PNOieoUKDvbpC+oVNnctz5zWqF38xa/XTRXH7KofGCON62uRSfaOE80Y nsLciZJS82QpZhjLS3L7DZ3+8maBL8OAKN2HXYih4lfqLYFTDNoiWkJjhms4rKzuPOTG S3MJodrEiKXPIfp4z6cdvtgUPnJae54mRlp9YleuH22sG96SGN0D0kmGkWFmPGbCKsj+ mIMf6EDthNrJWcgsK4DQPw6fLT5ufg9qqzzpdfZkONdDExZSBpbUg6FAiYjprDLaqbax 8PjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=KibtiPwmmYBqTAKX5chOQ9lLSB/xEu6zUsE7oksfaw4=; b=bTUdERxg0V9qy9PnmDeM2cGcBv/hzx0ZMwUfqvp6Bz6cs0NM0I6kWi7EwC4HKPfGgQ DvTKyQOO5HrHfwcRjFVO/Q+9HUQmuH0eNgxX/muFIWWmVyjKCo63HrgWOifug2/DYeJL r2alfqpTp0dxMPIXsVMQvEKmZVz463gmCskm5Le0hNjGVGiYz9maPFvmDFH+wsT+BVE+ bo/VPhRFPMFvvVFObrzuI/Vby347wj4PmSke6GIVGArGyiSuCPnqXbFPL7NXNfOyJWBh ljlGUS24ENw/99L3ofWqRv/Fq2wKhlav8SkXqMI8GFH4zUv+caFeEg7Crxqu8dfj6xAP nC7g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id jg40si3509135ejc.589.2021.07.02.15.11.03; Fri, 02 Jul 2021 15:11:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234513AbhGBWKU (ORCPT + 99 others); Fri, 2 Jul 2021 18:10:20 -0400 Received: from mga17.intel.com ([192.55.52.151]:15309 "EHLO mga17.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233176AbhGBWIp (ORCPT ); Fri, 2 Jul 2021 18:08:45 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10033"; a="189168415" X-IronPort-AV: E=Sophos;i="5.83,320,1616482800"; d="scan'208";a="189168415" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jul 2021 15:05:32 -0700 X-IronPort-AV: E=Sophos;i="5.83,320,1616482800"; d="scan'208";a="642814893" Received: from ls.sc.intel.com (HELO localhost) ([143.183.96.54]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jul 2021 15:05:31 -0700 From: isaku.yamahata@intel.com To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H . Peter Anvin" , Paolo Bonzini , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , erdemaktas@google.com, Connor Kuehl , Sean Christopherson , x86@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Kai Huang Subject: [RFC PATCH v2 64/69] cpu/hotplug: Document that TDX also depends on booting CPUs once Date: Fri, 2 Jul 2021 15:05:10 -0700 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kai Huang Add a comment to explain that TDX also depends on booting logical CPUs at least once. TDSYSINITLP must be run on all CPUs, even software disabled CPUs in the -nosmt case. Fortunately, current SMT handling for #MC already supports booting all CPUs once; the to-be-disabled sibling is booted once (and later put into deep C-state to honor SMT=off) to allow the init code to set CR4.MCE and avoid an unwanted shutdown on a broadcasted MCE. Signed-off-by: Kai Huang Signed-off-by: Isaku Yamahata --- kernel/cpu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/kernel/cpu.c b/kernel/cpu.c index e538518556f4..58377a03e9d6 100644 --- a/kernel/cpu.c +++ b/kernel/cpu.c @@ -446,6 +446,10 @@ static inline bool cpu_smt_allowed(unsigned int cpu) * that the init code can get a chance to set CR4.MCE on each * CPU. Otherwise, a broadcasted MCE observing CR4.MCE=0b on any * core will shutdown the machine. + * + * Intel TDX also requires running TDH_SYS_LP_INIT on all logical CPUs + * during boot, booting all CPUs once allows TDX to play nice with + * 'nosmt'. */ return !cpumask_test_cpu(cpu, &cpus_booted_once_mask); } -- 2.25.1