Received: by 2002:a05:6a10:f3d0:0:0:0:0 with SMTP id a16csp2288324pxv; Sat, 3 Jul 2021 04:34:34 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwf9T8m5AsR1utKLHntzjCNfiJwC32JoQhAcrsptBXFeYRQt5d4aEMHIo0FSsPF+rHL/0Hx X-Received: by 2002:a02:9f05:: with SMTP id z5mr3452813jal.23.1625312074849; Sat, 03 Jul 2021 04:34:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1625312074; cv=none; d=google.com; s=arc-20160816; b=PsCtQfEjD3+Fjp9ZbyOtTfC1iRByrt+BVcFxgOuQuvPAEYS31Yyxi+rK+q22HcF6Ip 9z3TpG7HVGeu92JMNIiDLFg1rkbuD186XldF0UMh1eNTgtYRiX24+TcE1AyFFjeOoT3i 1gg0u10eDuOzMePhoKkssZ7l7u2Nd0zQxF/iJYRJY0vyM26B4epN9eX0VqtQ1H38mZ0U qvcH6n6M9mq1jc07dyg9DFV2vGLiMKId7sZiB0aJv22UCrRVTWHwWM3WmED0e3A/o+GY kiuJ25ThcWMnMtquoraP3vSDWKQvpo+s2SXBnimf6wpJ5nUjd5AA/vxjIG8HzqfaYsTQ V/jA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:message-id:date:subject:cc:to:from; bh=D4l8hwV2pgrNltfOLyrteOHTw5SDB1c6vDzRCwIMcfs=; b=MPmw7P6FKvnTgHw2cUWK/s7CzVAkV3OKB5uKIKam+6625zUIdDaAkbMjjc0rtoiyZE AKq1Z4sNNPSR8h9g4peHI2W7vfv9jxbNTrepAceZhlniJZ0Nb0chr2iZacyMGJfZWaSb P0pXjdCD/6OxBEQ8oM2NrPrC6g8b0hBpnwgHJ+2R1LEGXpiHHx/w5Xa0VExq2oU5b7j8 NTO+noP9cP7t4xNxBQKlPguPB9MYdm65Eohb09iRTY+jC/pP8tbzo/olJjwDfrJo8OLx ijJmifiiT9c8n544CXYz46oU9vP/DkEM/kxLUeuhF6r73UrbRaI3ysHCxKsKsaONa1Sb be1w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id m19si7638710jav.63.2021.07.03.04.34.22; Sat, 03 Jul 2021 04:34:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230246AbhGCLf3 (ORCPT + 99 others); Sat, 3 Jul 2021 07:35:29 -0400 Received: from alexa-out.qualcomm.com ([129.46.98.28]:41238 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230225AbhGCLf2 (ORCPT ); Sat, 3 Jul 2021 07:35:28 -0400 Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 03 Jul 2021 04:32:55 -0700 X-QCInternal: smtphost Received: from ironmsg01-blr.qualcomm.com ([10.86.208.130]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 03 Jul 2021 04:32:54 -0700 X-QCInternal: smtphost Received: from kalyant-linux.qualcomm.com ([10.204.66.210]) by ironmsg01-blr.qualcomm.com with ESMTP; 03 Jul 2021 17:02:44 +0530 Received: by kalyant-linux.qualcomm.com (Postfix, from userid 94428) id D65274961; Sat, 3 Jul 2021 04:32:43 -0700 (PDT) From: Kalyan Thota To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Cc: Kalyan Thota , linux-kernel@vger.kernel.org, robdclark@gmail.com, dianders@chromium.org, mkrishn@codeaurora.org Subject: [RFC] Inline rotation support in dpu driver Date: Sat, 3 Jul 2021 04:32:42 -0700 Message-Id: <1625311962-14185-1-git-send-email-kalyan_t@codeaurora.org> X-Mailer: git-send-email 2.7.4 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This change adds support for inline rotation in the dpu driver. When inline rotation is enabled the VIG pipes will directly fetch the image from memory in a rotated fashion Inline rotation has following restrictions 1) Supported only with compressed formats 2) max pre rotated height is 1088 3) restrictions with downscaling ratio Queries: 1) Since inline rotation works for fewer pixel formats with specific modifier, how can we provide this information to the compositor so that chrome compositor can choose between overlaying or falling back to GPU. In the patch it fails in the atomic check. 2) If a display composition fails in atomic check due to any of the restrictions in overlays can chrome compositor switch it back to the GPU and re trigger the commit ? posting it as RFC as validation is not complete, please share early comments on this. Kalyan Thota (1): drm/msm/disp/dpu1: add support for inline rotation in dpu driver drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 47 +++++++++---- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 20 ++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 93 ++++++++++++++++++++------ drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h | 2 + 4 files changed, 128 insertions(+), 34 deletions(-) -- 2.7.4